Revert "radv/llvm,aco: always split typed vertex buffer loads on GFX6 and GFX10+"
It introduces regressions.
This reverts commit 6fb4babfe9
.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7852>
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@@ -1184,15 +1184,17 @@ handle_vs_input_decl(struct radv_shader_context *ctx,
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t_offset = LLVMConstInt(ctx->ac.i32, attrib_binding, false);
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t_list = ac_build_load_to_sgpr(&ctx->ac, t_list_ptr, t_offset);
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/* Always split typed vertex buffer loads on GFX6 and GFX10+
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* to avoid any alignment issues that triggers memory
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* violations and eventually a GPU hang. This can happen if
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* the stride (static or dynamic) is unaligned and also if the
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* VBO offset is aligned to a scalar (eg. stride is 8 and VBO
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* offset is 2 for R16G16B16A16_SNORM).
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/* Perform per-channel vertex fetch operations if unaligned
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* access are detected. Only GFX6 and GFX10 are affected.
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*/
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if (ctx->ac.chip_class == GFX6 ||
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ctx->ac.chip_class >= GFX10) {
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bool unaligned_vertex_fetches = false;
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if ((ctx->ac.chip_class == GFX6 || ctx->ac.chip_class >= GFX10) &&
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vtx_info->chan_format != data_format &&
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((attrib_offset % vtx_info->element_size) ||
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(attrib_stride % vtx_info->element_size)))
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unaligned_vertex_fetches = true;
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if (unaligned_vertex_fetches) {
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unsigned chan_format = vtx_info->chan_format;
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LLVMValueRef values[4];
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