microsoft/compiler: zero out unused WebGPU system values
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10439>
This commit is contained in:
@@ -1295,3 +1295,63 @@ dxil_nir_lower_double_math(nir_shader *shader)
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return progress;
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return progress;
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}
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}
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typedef struct {
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gl_system_value *values;
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uint32_t count;
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} zero_system_values_state;
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static bool
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lower_system_value_to_zero_filter(const nir_instr* instr, const void* cb_state)
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{
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if (instr->type != nir_instr_type_intrinsic) {
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return false;
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}
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nir_intrinsic_instr* intrin = nir_instr_as_intrinsic(instr);
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/* All the intrinsics we care about are loads */
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if (!nir_intrinsic_infos[intrin->intrinsic].has_dest)
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return false;
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assert(intrin->dest.is_ssa);
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zero_system_values_state* state = (zero_system_values_state*)cb_state;
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for (uint32_t i = 0; i < state->count; ++i) {
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gl_system_value value = state->values[i];
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nir_intrinsic_op value_op = nir_intrinsic_from_system_value(value);
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if (intrin->intrinsic == value_op) {
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return true;
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} else if (intrin->intrinsic == nir_intrinsic_load_deref) {
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nir_deref_instr* deref = nir_src_as_deref(intrin->src[0]);
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if (!nir_deref_mode_is(deref, nir_var_system_value))
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return false;
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nir_variable* var = deref->var;
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if (var->data.location == value) {
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return true;
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}
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}
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}
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return false;
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}
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static nir_ssa_def*
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lower_system_value_to_zero_instr(nir_builder* b, nir_instr* instr, void* _state)
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{
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return nir_imm_int(b, 0);
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}
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bool
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dxil_nir_lower_system_values_to_zero(nir_shader* shader,
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gl_system_value* system_values,
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uint32_t count)
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{
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zero_system_values_state state = { system_values, count };
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return nir_shader_lower_instructions(shader,
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lower_system_value_to_zero_filter,
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lower_system_value_to_zero_instr,
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&state);
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}
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@@ -46,6 +46,9 @@ bool dxil_nir_lower_upcast_phis(nir_shader *shader, unsigned min_bit_size);
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bool dxil_nir_lower_fp16_casts(nir_shader *shader);
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bool dxil_nir_lower_fp16_casts(nir_shader *shader);
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bool dxil_nir_split_clip_cull_distance(nir_shader *shader);
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bool dxil_nir_split_clip_cull_distance(nir_shader *shader);
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bool dxil_nir_lower_double_math(nir_shader *shader);
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bool dxil_nir_lower_double_math(nir_shader *shader);
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bool dxil_nir_lower_system_values_to_zero(nir_shader *shader,
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gl_system_value* system_value,
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uint32_t count);
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nir_ssa_def *
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nir_ssa_def *
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build_load_ubo_dxil(nir_builder *b, nir_ssa_def *buffer,
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build_load_ubo_dxil(nir_builder *b, nir_ssa_def *buffer,
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@@ -43,10 +43,14 @@ spirv_to_dxil(const uint32_t *words, size_t word_count,
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glsl_type_singleton_init_or_ref();
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glsl_type_singleton_init_or_ref();
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struct nir_shader_compiler_options nir_options = *dxil_get_nir_compiler_options();
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// We will manually handle base_vertex
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nir_options.lower_base_vertex = false;
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nir_shader *nir = spirv_to_nir(
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nir_shader *nir = spirv_to_nir(
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words, word_count, (struct nir_spirv_specialization *)specializations,
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words, word_count, (struct nir_spirv_specialization *)specializations,
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num_specializations, (gl_shader_stage)stage, entry_point_name,
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num_specializations, (gl_shader_stage)stage, entry_point_name,
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&spirv_opts, dxil_get_nir_compiler_options());
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&spirv_opts, &nir_options);
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if (!nir) {
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if (!nir) {
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glsl_type_singleton_decref();
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glsl_type_singleton_decref();
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return false;
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return false;
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@@ -55,6 +59,18 @@ spirv_to_dxil(const uint32_t *words, size_t word_count,
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nir_validate_shader(nir,
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nir_validate_shader(nir,
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"Validate before feeding NIR to the DXIL compiler");
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"Validate before feeding NIR to the DXIL compiler");
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NIR_PASS_V(nir, nir_lower_system_values);
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// vertex_id and instance_id should have already been transformed to base
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// zero before spirv_to_dxil was called. Also, WebGPU does not support
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// base/firstVertex/Instance.
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gl_system_value system_values[] = {
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SYSTEM_VALUE_FIRST_VERTEX,
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SYSTEM_VALUE_BASE_VERTEX,
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SYSTEM_VALUE_BASE_INSTANCE
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};
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NIR_PASS_V(nir, dxil_nir_lower_system_values_to_zero, system_values, ARRAY_SIZE(system_values));
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NIR_PASS_V(nir, nir_split_per_member_structs);
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NIR_PASS_V(nir, nir_split_per_member_structs);
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NIR_PASS_V(nir, nir_lower_explicit_io, nir_var_mem_ubo | nir_var_mem_ssbo,
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NIR_PASS_V(nir, nir_lower_explicit_io, nir_var_mem_ubo | nir_var_mem_ssbo,
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@@ -112,6 +128,8 @@ spirv_to_dxil(const uint32_t *words, size_t word_count,
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NIR_PASS_V(nir, dxil_nir_split_clip_cull_distance);
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NIR_PASS_V(nir, dxil_nir_split_clip_cull_distance);
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NIR_PASS_V(nir, dxil_nir_lower_loads_stores_to_dxil);
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NIR_PASS_V(nir, dxil_nir_lower_loads_stores_to_dxil);
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nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
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struct nir_to_dxil_options opts = {.vulkan_environment = true};
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struct nir_to_dxil_options opts = {.vulkan_environment = true};
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struct blob dxil_blob;
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struct blob dxil_blob;
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