intel/fs: Lower unsupported regioning with non-trivial 2D regions on FIXED_GRFs.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25020>
This commit is contained in:

committed by
Jordan Justen

parent
dd632bf527
commit
37e280f28a
@@ -207,6 +207,44 @@ namespace {
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}
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}
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/*
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* Return the stride between channels of the specified register in
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* byte units, or ~0u if the region cannot be represented with a
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* single one-dimensional stride.
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*/
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unsigned
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byte_stride(const fs_reg ®)
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{
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switch (reg.file) {
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case BAD_FILE:
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case UNIFORM:
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case IMM:
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case VGRF:
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case MRF:
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case ATTR:
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return reg.stride * type_sz(reg.type);
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case ARF:
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case FIXED_GRF:
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if (reg.is_null()) {
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return 0;
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} else {
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const unsigned hstride = reg.hstride ? 1 << (reg.hstride - 1) : 0;
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const unsigned vstride = reg.vstride ? 1 << (reg.vstride - 1) : 0;
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const unsigned width = 1 << reg.width;
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if (width == 1) {
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return vstride * type_sz(reg.type);
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} else if (hstride * width == vstride) {
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return hstride * type_sz(reg.type);
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} else {
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return ~0u;
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}
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}
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default:
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unreachable("Invalid register file");
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}
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}
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/*
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/*
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* Return whether the instruction has an unsupported channel bit layout
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* Return whether the instruction has an unsupported channel bit layout
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* specified for the i-th source region.
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* specified for the i-th source region.
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@@ -236,15 +274,12 @@ namespace {
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return true;
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return true;
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}
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}
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const unsigned dst_byte_stride = inst->dst.stride * type_sz(inst->dst.type);
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const unsigned src_byte_stride = inst->src[i].stride *
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type_sz(inst->src[i].type);
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const unsigned dst_byte_offset = reg_offset(inst->dst) % REG_SIZE;
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const unsigned dst_byte_offset = reg_offset(inst->dst) % REG_SIZE;
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const unsigned src_byte_offset = reg_offset(inst->src[i]) % REG_SIZE;
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const unsigned src_byte_offset = reg_offset(inst->src[i]) % REG_SIZE;
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return has_dst_aligned_region_restriction(devinfo, inst) &&
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return has_dst_aligned_region_restriction(devinfo, inst) &&
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!is_uniform(inst->src[i]) &&
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!is_uniform(inst->src[i]) &&
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(src_byte_stride != dst_byte_stride ||
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(byte_stride(inst->src[i]) != byte_stride(inst->dst) ||
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src_byte_offset != dst_byte_offset);
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src_byte_offset != dst_byte_offset);
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}
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}
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@@ -261,15 +296,14 @@ namespace {
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} else {
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} else {
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const brw_reg_type exec_type = get_exec_type(inst);
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const brw_reg_type exec_type = get_exec_type(inst);
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const unsigned dst_byte_offset = reg_offset(inst->dst) % REG_SIZE;
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const unsigned dst_byte_offset = reg_offset(inst->dst) % REG_SIZE;
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const unsigned dst_byte_stride = inst->dst.stride * type_sz(inst->dst.type);
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const bool is_narrowing_conversion = !is_byte_raw_mov(inst) &&
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const bool is_narrowing_conversion = !is_byte_raw_mov(inst) &&
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type_sz(inst->dst.type) < type_sz(exec_type);
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type_sz(inst->dst.type) < type_sz(exec_type);
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return (has_dst_aligned_region_restriction(devinfo, inst) &&
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return (has_dst_aligned_region_restriction(devinfo, inst) &&
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(required_dst_byte_stride(inst) != dst_byte_stride ||
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(required_dst_byte_stride(inst) != byte_stride(inst->dst) ||
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required_dst_byte_offset(inst) != dst_byte_offset)) ||
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required_dst_byte_offset(inst) != dst_byte_offset)) ||
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(is_narrowing_conversion &&
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(is_narrowing_conversion &&
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required_dst_byte_stride(inst) != dst_byte_stride);
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required_dst_byte_stride(inst) != byte_stride(inst->dst));
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}
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}
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}
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}
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