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i965: Rename intel_screen to brw_screen

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Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9207>
This commit is contained in:
Kenneth Graunke
2021-02-22 10:40:10 -08:00
committed by Marge Bot
parent 462c9e173c
commit 3733bbe842
13 changed files with 70 additions and 70 deletions
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10
src/mesa/drivers/dri/i965/brw_context.c
View File

@@ -88,7 +88,7 @@
const char *const brw_vendor_string = "Intel Open Source Technology Center";
static const char *
get_bsw_model(const struct intel_screen *screen)
get_bsw_model(const struct brw_screen *screen)
{
switch (screen->eu_total) {
case 16:
@@ -101,7 +101,7 @@ get_bsw_model(const struct intel_screen *screen)
}
const char *
brw_get_renderer_string(const struct intel_screen *screen)
brw_get_renderer_string(const struct brw_screen *screen)
{
static char buf[128];
const char *name = gen_get_device_name(screen->deviceID);
@@ -805,7 +805,7 @@ static void
brw_initialize_cs_context_constants(struct brw_context *brw)
{
struct gl_context *ctx = &brw->ctx;
const struct intel_screen *screen = brw->screen;
const struct brw_screen *screen = brw->screen;
struct gen_device_info *devinfo = &brw->screen->devinfo;
/* FINISHME: Do this for all platforms that the kernel supports */
@@ -939,7 +939,7 @@ brwCreateContext(gl_api api,
void *sharedContextPrivate)
{
struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
struct intel_screen *screen = driContextPriv->driScreenPriv->driverPrivate;
struct brw_screen *screen = driContextPriv->driScreenPriv->driverPrivate;
const struct gen_device_info *devinfo = &screen->devinfo;
struct dd_function_table functions;
@@ -1310,7 +1310,7 @@ intelUnbindContext(__DRIcontext * driContextPriv)
* result in broken rendering of GLES apps that aren't expecting sRGB encode.
*
* Unfortunately, renderbuffer setup happens before a context is created. So
* in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
* in brw_screen.c we always set up sRGB, and here, if you're a GLES2/3
* context (without an sRGB visual), we go turn that back off before anyone
* finds out.
*/

6
src/mesa/drivers/dri/i965/brw_context.h
View File

@@ -1249,7 +1249,7 @@ struct brw_context
unsigned current_hash_scale;
__DRIcontext *driContext;
struct intel_screen *screen;
struct brw_screen *screen;
void *mem_ctx;
};
@@ -1262,7 +1262,7 @@ extern void intelInitClearFuncs(struct dd_function_table *functions);
extern const char *const brw_vendor_string;
extern const char *
brw_get_renderer_string(const struct intel_screen *screen);
brw_get_renderer_string(const struct brw_screen *screen);
enum {
DRI_CONF_BO_REUSE_DISABLED,
@@ -1424,7 +1424,7 @@ void brw_upload_image_surfaces(struct brw_context *brw,
struct brw_stage_prog_data *prog_data);
/* brw_surface_formats.c */
void intel_screen_init_surface_formats(struct intel_screen *screen);
void brw_screen_init_surface_formats(struct brw_screen *screen);
void brw_init_surface_formats(struct brw_context *brw);
bool brw_render_target_supported(struct brw_context *brw,
struct gl_renderbuffer *rb);

2
src/mesa/drivers/dri/i965/brw_disk_cache.c
View File

@@ -388,7 +388,7 @@ brw_disk_cache_write_compute_program(struct brw_context *brw)
}
void
brw_disk_cache_init(struct intel_screen *screen)
brw_disk_cache_init(struct brw_screen *screen)
{
#ifdef ENABLE_SHADER_CACHE
if (INTEL_DEBUG & DEBUG_DISK_CACHE_DISABLE_MASK)

2
src/mesa/drivers/dri/i965/brw_program.c
View File

@@ -215,7 +215,7 @@ brw_shader_gather_info(nir_shader *nir, struct gl_program *prog)
}
static unsigned
get_new_program_id(struct intel_screen *screen)
get_new_program_id(struct brw_screen *screen)
{
return p_atomic_inc_return(&screen->program_id);
}

2
src/mesa/drivers/dri/i965/brw_state.h
View File

@@ -149,7 +149,7 @@ void gen8_write_pma_stall_bits(struct brw_context *brw,
uint32_t pma_stall_bits);
/* brw_disk_cache.c */
void brw_disk_cache_init(struct intel_screen *screen);
void brw_disk_cache_init(struct brw_screen *screen);
bool brw_disk_cache_upload_program(struct brw_context *brw,
gl_shader_stage stage);
void brw_disk_cache_write_compute_program(struct brw_context *brw);

4
src/mesa/drivers/dri/i965/brw_surface_formats.c
View File

@@ -204,7 +204,7 @@ brw_isl_format_for_mesa_format(mesa_format mesa_format)
}
void
intel_screen_init_surface_formats(struct intel_screen *screen)
brw_screen_init_surface_formats(struct brw_screen *screen)
{
const struct gen_device_info *devinfo = &screen->devinfo;
mesa_format format;
@@ -397,7 +397,7 @@ intel_screen_init_surface_formats(struct intel_screen *screen)
void
brw_init_surface_formats(struct brw_context *brw)
{
struct intel_screen *screen = brw->screen;
struct brw_screen *screen = brw->screen;
struct gl_context *ctx = &brw->ctx;
brw->mesa_format_supports_render = screen->mesa_format_supports_render;

2
src/mesa/drivers/dri/i965/brw_sync.c
View File

@@ -474,7 +474,7 @@ brw_dri_server_wait_sync(__DRIcontext *ctx, void *_fence, unsigned flags)
static unsigned
brw_dri_get_capabilities(__DRIscreen *dri_screen)
{
struct intel_screen *screen = dri_screen->driverPrivate;
struct brw_screen *screen = dri_screen->driverPrivate;
unsigned caps = 0;
if (screen->has_exec_fence)

4
src/mesa/drivers/dri/i965/intel_batchbuffer.c
View File

@@ -126,7 +126,7 @@ init_reloc_list(struct brw_reloc_list *rlist, int count)
void
brw_batch_init(struct brw_context *brw)
{
struct intel_screen *screen = brw->screen;
struct brw_screen *screen = brw->screen;
struct brw_batch *batch = &brw->batch;
const struct gen_device_info *devinfo = &screen->devinfo;
@@ -225,7 +225,7 @@ recreate_growing_buffer(struct brw_context *brw,
const char *name, unsigned size,
enum brw_memory_zone memzone)
{
struct intel_screen *screen = brw->screen;
struct brw_screen *screen = brw->screen;
struct brw_batch *batch = &brw->batch;
struct brw_bufmgr *bufmgr = screen->bufmgr;

10
src/mesa/drivers/dri/i965/intel_fbo.c
View File

@@ -231,7 +231,7 @@ intel_unmap_renderbuffer(struct gl_context *ctx,
* Round up the requested multisample count to the next supported sample size.
*/
unsigned
intel_quantize_num_samples(struct intel_screen *intel, unsigned num_samples)
intel_quantize_num_samples(struct brw_screen *intel, unsigned num_samples)
{
const int *msaa_modes = intel_supported_msaa_modes(intel);
int quantized_samples = 0;
@@ -284,7 +284,7 @@ intel_alloc_private_renderbuffer_storage(struct gl_context * ctx, struct gl_rend
GLuint width, GLuint height)
{
struct brw_context *brw = brw_context(ctx);
struct intel_screen *screen = brw->screen;
struct brw_screen *screen = brw->screen;
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
assert(rb->Format != MESA_FORMAT_NONE);
@@ -329,7 +329,7 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer
}
static mesa_format
fallback_rgbx_to_rgba(struct intel_screen *screen, struct gl_renderbuffer *rb,
fallback_rgbx_to_rgba(struct brw_screen *screen, struct gl_renderbuffer *rb,
mesa_format original_format)
{
mesa_format format = original_format;
@@ -452,7 +452,7 @@ intel_nop_alloc_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
* \param num_samples must be quantized.
*/
struct intel_renderbuffer *
intel_create_winsys_renderbuffer(struct intel_screen *screen,
intel_create_winsys_renderbuffer(struct brw_screen *screen,
mesa_format format, unsigned num_samples)
{
struct intel_renderbuffer *irb = CALLOC_STRUCT(intel_renderbuffer);
@@ -485,7 +485,7 @@ intel_create_winsys_renderbuffer(struct intel_screen *screen,
* \param num_samples must be quantized.
*/
struct intel_renderbuffer *
intel_create_private_renderbuffer(struct intel_screen *screen,
intel_create_private_renderbuffer(struct brw_screen *screen,
mesa_format format, unsigned num_samples)
{
struct intel_renderbuffer *irb;

6
src/mesa/drivers/dri/i965/intel_fbo.h
View File

@@ -185,11 +185,11 @@ intel_rb_format(const struct intel_renderbuffer *rb)
}
extern struct intel_renderbuffer *
intel_create_winsys_renderbuffer(struct intel_screen *screen,
intel_create_winsys_renderbuffer(struct brw_screen *screen,
mesa_format format, unsigned num_samples);
struct intel_renderbuffer *
intel_create_private_renderbuffer(struct intel_screen *screen,
intel_create_private_renderbuffer(struct brw_screen *screen,
mesa_format format, unsigned num_samples);
struct gl_renderbuffer*
@@ -246,7 +246,7 @@ void brw_render_cache_add_bo(struct brw_context *brw, struct brw_bo *bo,
void brw_depth_cache_add_bo(struct brw_context *brw, struct brw_bo *bo);
unsigned
intel_quantize_num_samples(struct intel_screen *intel, unsigned num_samples);
intel_quantize_num_samples(struct brw_screen *intel, unsigned num_samples);
#ifdef __cplusplus
}

4
src/mesa/drivers/dri/i965/intel_image.h
View File

@@ -33,7 +33,7 @@
*
* The __DRIimage is passed around the loader code (src/glx and src/egl), but
* it's opaque to that code and may only be accessed by loader extensions
* (mostly located in intel_screen.c).
* (mostly located in brw_screen.c).
*/
#include <stdbool.h>
@@ -66,7 +66,7 @@ struct intel_image_format {
};
struct __DRIimageRec {
struct intel_screen *screen;
struct brw_screen *screen;
struct brw_bo *bo;
uint32_t pitch; /**< in bytes */
GLenum internal_format;

72
src/mesa/drivers/dri/i965/intel_screen.c
View File

@@ -456,7 +456,7 @@ intel_image_get_fourcc(__DRIimage *image, int *fourcc)
}
static __DRIimage *
intel_allocate_image(struct intel_screen *screen, int dri_format,
intel_allocate_image(struct brw_screen *screen, int dri_format,
void *loaderPrivate)
{
__DRIimage *image;
@@ -515,7 +515,7 @@ intel_create_image_from_name(__DRIscreen *dri_screen,
int width, int height, int format,
int name, int pitch, void *loaderPrivate)
{
struct intel_screen *screen = dri_screen->driverPrivate;
struct brw_screen *screen = dri_screen->driverPrivate;
__DRIimage *image;
int cpp;
@@ -726,7 +726,7 @@ intel_create_image_common(__DRIscreen *dri_screen,
void *loaderPrivate)
{
__DRIimage *image;
struct intel_screen *screen = dri_screen->driverPrivate;
struct brw_screen *screen = dri_screen->driverPrivate;
uint64_t modifier = DRM_FORMAT_MOD_INVALID;
bool ok;
@@ -982,7 +982,7 @@ intel_query_format_modifier_attribs(__DRIscreen *dri_screen,
uint32_t fourcc, uint64_t modifier,
int attrib, uint64_t *value)
{
struct intel_screen *screen = dri_screen->driverPrivate;
struct brw_screen *screen = dri_screen->driverPrivate;
const struct intel_image_format *f = intel_image_format_lookup(fourcc);
if (!modifier_is_supported(&screen->devinfo, f, 0, modifier))
@@ -1087,7 +1087,7 @@ intel_create_image_from_fds_common(__DRIscreen *dri_screen,
int *strides, int *offsets,
void *loaderPrivate)
{
struct intel_screen *screen = dri_screen->driverPrivate;
struct brw_screen *screen = dri_screen->driverPrivate;
const struct intel_image_format *f;
__DRIimage *image;
int i, index;
@@ -1364,7 +1364,7 @@ static GLboolean
intel_query_dma_buf_formats(__DRIscreen *_screen, int max,
int *formats, int *count)
{
struct intel_screen *screen = _screen->driverPrivate;
struct brw_screen *screen = _screen->driverPrivate;
int num_formats = 0, i;
for (i = 0; i < ARRAY_SIZE(intel_image_formats); i++) {
@@ -1400,7 +1400,7 @@ intel_query_dma_buf_modifiers(__DRIscreen *_screen, int fourcc, int max,
unsigned int *external_only,
int *count)
{
struct intel_screen *screen = _screen->driverPrivate;
struct brw_screen *screen = _screen->driverPrivate;
const struct intel_image_format *f;
int num_mods = 0, i;
@@ -1539,8 +1539,8 @@ static int
brw_query_renderer_integer(__DRIscreen *dri_screen,
int param, unsigned int *value)
{
const struct intel_screen *const screen =
(struct intel_screen *) dri_screen->driverPrivate;
const struct brw_screen *const screen =
(struct brw_screen *) dri_screen->driverPrivate;
switch (param) {
case __DRI2_RENDERER_VENDOR_ID:
@@ -1608,8 +1608,8 @@ static int
brw_query_renderer_string(__DRIscreen *dri_screen,
int param, const char **value)
{
const struct intel_screen *screen =
(struct intel_screen *) dri_screen->driverPrivate;
const struct brw_screen *screen =
(struct brw_screen *) dri_screen->driverPrivate;
switch (param) {
case __DRI2_RENDERER_VENDOR_ID:
@@ -1629,8 +1629,8 @@ static void
brw_set_cache_funcs(__DRIscreen *dri_screen,
__DRIblobCacheSet set, __DRIblobCacheGet get)
{
const struct intel_screen *const screen =
(struct intel_screen *) dri_screen->driverPrivate;
const struct brw_screen *const screen =
(struct brw_screen *) dri_screen->driverPrivate;
if (!screen->disk_cache)
return;
@@ -1686,7 +1686,7 @@ static const __DRIextension *intelRobustScreenExtensions[] = {
};
static int
intel_get_param(struct intel_screen *screen, int param, int *value)
intel_get_param(struct brw_screen *screen, int param, int *value)
{
int ret = 0;
struct drm_i915_getparam gp;
@@ -1705,14 +1705,14 @@ intel_get_param(struct intel_screen *screen, int param, int *value)
}
static bool
intel_get_boolean(struct intel_screen *screen, int param)
intel_get_boolean(struct brw_screen *screen, int param)
{
int value = 0;
return (intel_get_param(screen, param, &value) == 0) && value;
}
static int
intel_get_integer(struct intel_screen *screen, int param)
intel_get_integer(struct brw_screen *screen, int param)
{
int value = -1;
@@ -1725,7 +1725,7 @@ intel_get_integer(struct intel_screen *screen, int param)
static void
intelDestroyScreen(__DRIscreen * sPriv)
{
struct intel_screen *screen = sPriv->driverPrivate;
struct brw_screen *screen = sPriv->driverPrivate;
brw_bufmgr_unref(screen->bufmgr);
driDestroyOptionInfo(&screen->optionCache);
@@ -1750,7 +1750,7 @@ intelCreateBuffer(__DRIscreen *dri_screen,
const struct gl_config * mesaVis, GLboolean isPixmap)
{
struct intel_renderbuffer *rb;
struct intel_screen *screen = (struct intel_screen *)
struct brw_screen *screen = (struct brw_screen *)
dri_screen->driverPrivate;
mesa_format rgbFormat;
unsigned num_samples =
@@ -1872,7 +1872,7 @@ intelDestroyBuffer(__DRIdrawable * driDrawPriv)
}
static void
intel_cs_timestamp_frequency(struct intel_screen *screen)
intel_cs_timestamp_frequency(struct brw_screen *screen)
{
/* We shouldn't need to update gen_device_info.timestamp_frequency prior to
* gen10, PCI-id is enough to figure it out.
@@ -1893,7 +1893,7 @@ intel_cs_timestamp_frequency(struct intel_screen *screen)
}
static void
intel_detect_sseu(struct intel_screen *screen)
intel_detect_sseu(struct brw_screen *screen)
{
assert(screen->devinfo.gen >= 8);
int ret;
@@ -1928,7 +1928,7 @@ err_out:
}
static bool
intel_init_bufmgr(struct intel_screen *screen)
intel_init_bufmgr(struct brw_screen *screen)
{
__DRIscreen *dri_screen = screen->driScrnPriv;
@@ -1962,7 +1962,7 @@ intel_init_bufmgr(struct intel_screen *screen)
}
static bool
intel_detect_swizzling(struct intel_screen *screen)
intel_detect_swizzling(struct brw_screen *screen)
{
/* Broadwell PRM says:
*
@@ -1993,7 +1993,7 @@ intel_detect_swizzling(struct intel_screen *screen)
}
static int
intel_detect_timestamp(struct intel_screen *screen)
intel_detect_timestamp(struct brw_screen *screen)
{
uint64_t dummy = 0, last = 0;
int upper, lower, loops;
@@ -2044,7 +2044,7 @@ intel_detect_timestamp(struct intel_screen *screen)
* try and write a register and see if works.
*/
static bool
intel_detect_pipelined_register(struct intel_screen *screen,
intel_detect_pipelined_register(struct brw_screen *screen,
int reg, uint32_t expected_value, bool reset)
{
if (screen->no_hw)
@@ -2136,7 +2136,7 @@ err:
}
static bool
intel_detect_pipelined_so(struct intel_screen *screen)
intel_detect_pipelined_so(struct brw_screen *screen)
{
const struct gen_device_info *devinfo = &screen->devinfo;
@@ -2165,7 +2165,7 @@ intel_detect_pipelined_so(struct intel_screen *screen)
* zero-terminated and sorted in decreasing order.
*/
const int*
intel_supported_msaa_modes(const struct intel_screen *screen)
intel_supported_msaa_modes(const struct brw_screen *screen)
{
static const int gen9_modes[] = {16, 8, 4, 2, 0, -1};
static const int gen8_modes[] = {8, 4, 2, 0, -1};
@@ -2203,7 +2203,7 @@ intel_loader_get_cap(const __DRIscreen *dri_screen, enum dri_loader_cap cap)
static bool
intel_allowed_format(__DRIscreen *dri_screen, mesa_format format)
{
struct intel_screen *screen = dri_screen->driverPrivate;
struct brw_screen *screen = dri_screen->driverPrivate;
/* Expose only BGRA ordering if the loader doesn't support RGBA ordering. */
bool allow_rgba_ordering = intel_loader_get_cap(dri_screen, DRI_LOADER_CAP_RGBA_ORDERING);
@@ -2240,7 +2240,7 @@ intel_allowed_format(__DRIscreen *dri_screen, mesa_format format)
}
static __DRIconfig**
intel_screen_make_configs(__DRIscreen *dri_screen)
brw_screen_make_configs(__DRIscreen *dri_screen)
{
static const mesa_format formats[] = {
MESA_FORMAT_B5G6R5_UNORM,
@@ -2288,7 +2288,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
static const uint8_t singlesample_samples[1] = {0};
struct intel_screen *screen = dri_screen->driverPrivate;
struct brw_screen *screen = dri_screen->driverPrivate;
const struct gen_device_info *devinfo = &screen->devinfo;
uint8_t depth_bits[4], stencil_bits[4];
__DRIconfig **configs = NULL;
@@ -2448,7 +2448,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
}
static void
set_max_gl_versions(struct intel_screen *screen)
set_max_gl_versions(struct brw_screen *screen)
{
__DRIscreen *dri_screen = screen->driScrnPriv;
const bool has_astc = screen->devinfo.gen >= 9;
@@ -2490,7 +2490,7 @@ set_max_gl_versions(struct intel_screen *screen)
dri_screen->max_gl_es2_version = 20;
break;
default:
unreachable("unrecognized intel_screen::gen");
unreachable("unrecognized brw_screen::gen");
}
/* OpenGL 3.3+ requires GL_ARB_blend_func_extended. Don't advertise those
@@ -2564,7 +2564,7 @@ shader_perf_log_mesa(void *data, const char *fmt, ...)
static const
__DRIconfig **intelInitScreen2(__DRIscreen *dri_screen)
{
struct intel_screen *screen;
struct brw_screen *screen;
if (dri_screen->image.loader) {
} else if (dri_screen->dri2.loader->base.version <= 2 ||
@@ -2576,7 +2576,7 @@ __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen)
}
/* Allocate the private area */
screen = rzalloc(NULL, struct intel_screen);
screen = rzalloc(NULL, struct brw_screen);
if (!screen) {
fprintf(stderr, "\nERROR! Allocating private area failed\n");
return NULL;
@@ -2868,7 +2868,7 @@ __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen)
screen->has_exec_fence =
intel_get_boolean(screen, I915_PARAM_HAS_EXEC_FENCE);
intel_screen_init_surface_formats(screen);
brw_screen_init_surface_formats(screen);
if (INTEL_DEBUG & (DEBUG_BATCH | DEBUG_SUBMIT)) {
unsigned int caps = intel_get_integer(screen, I915_PARAM_HAS_SCHEDULER);
@@ -2883,7 +2883,7 @@ __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen)
brw_disk_cache_init(screen);
return (const __DRIconfig**) intel_screen_make_configs(dri_screen);
return (const __DRIconfig**) brw_screen_make_configs(dri_screen);
}
struct intel_buffer {
@@ -2897,7 +2897,7 @@ intelAllocateBuffer(__DRIscreen *dri_screen,
int width, int height)
{
struct intel_buffer *intelBuffer;
struct intel_screen *screen = dri_screen->driverPrivate;
struct brw_screen *screen = dri_screen->driverPrivate;
assert(attachment == __DRI_BUFFER_FRONT_LEFT ||
attachment == __DRI_BUFFER_BACK_LEFT);

16
src/mesa/drivers/dri/i965/intel_screen.h
View File

@@ -44,7 +44,7 @@
extern "C" {
#endif
struct intel_screen
struct brw_screen
{
int deviceID;
struct gen_device_info devinfo;
@@ -140,40 +140,40 @@ intelMakeCurrent(__DRIcontext * driContextPriv,
double get_time(void);
const int*
intel_supported_msaa_modes(const struct intel_screen *screen);
intel_supported_msaa_modes(const struct brw_screen *screen);
static inline bool
can_do_pipelined_register_writes(const struct intel_screen *screen)
can_do_pipelined_register_writes(const struct brw_screen *screen)
{
return screen->kernel_features & KERNEL_ALLOWS_SOL_OFFSET_WRITES;
}
static inline bool
can_do_hsw_l3_atomics(const struct intel_screen *screen)
can_do_hsw_l3_atomics(const struct brw_screen *screen)
{
return screen->kernel_features & KERNEL_ALLOWS_HSW_SCRATCH1_AND_ROW_CHICKEN3;
}
static inline bool
can_do_mi_math_and_lrr(const struct intel_screen *screen)
can_do_mi_math_and_lrr(const struct brw_screen *screen)
{
return screen->kernel_features & KERNEL_ALLOWS_MI_MATH_AND_LRR;
}
static inline bool
can_do_compute_dispatch(const struct intel_screen *screen)
can_do_compute_dispatch(const struct brw_screen *screen)
{
return screen->kernel_features & KERNEL_ALLOWS_COMPUTE_DISPATCH;
}
static inline bool
can_do_predicate_writes(const struct intel_screen *screen)
can_do_predicate_writes(const struct brw_screen *screen)
{
return screen->kernel_features & KERNEL_ALLOWS_PREDICATE_WRITES;
}
static inline bool
can_do_exec_capture(const struct intel_screen *screen)
can_do_exec_capture(const struct brw_screen *screen)
{
return screen->kernel_features & KERNEL_ALLOWS_EXEC_CAPTURE;
}