From 34be14d957aa6e4252a9d61b5d5ad7cb74a8424d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Tue, 21 May 2024 12:36:17 -0400 Subject: [PATCH] radeonsi/gfx12: fix incorrect condition for when to do clear_buffer via compute It was missing the requirement that offset % 4 == 0. Acked-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/gallium/drivers/radeonsi/si_compute_blit.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_compute_blit.c b/src/gallium/drivers/radeonsi/si_compute_blit.c index e505266cd28..1c420befcc6 100644 --- a/src/gallium/drivers/radeonsi/si_compute_blit.c +++ b/src/gallium/drivers/radeonsi/si_compute_blit.c @@ -372,11 +372,9 @@ void si_clear_buffer(struct si_context *sctx, struct pipe_resource *dst, (flags & SI_OP_CS_RENDER_COND_ENABLE || /* CP DMA doesn't support large clear value sizes. */ clear_value_size > 4 || - /* Use compute if CP DMA is non-coherent. */ - (sctx->screen->info.cp_sdma_ge_use_system_memory_scope && - clear_value_size >= 4) || - /* Use compute if the size is large enough. */ - (clear_value_size == 4 && offset % 4 == 0 && size > compute_min_size))) + /* Use compute if the size is large enough. Always prefer compute on GFX12. */ + (clear_value_size == 4 && offset % 4 == 0 && + (size > compute_min_size || sctx->screen->info.cp_sdma_ge_use_system_memory_scope)))) method = SI_COMPUTE_CLEAR_METHOD; if (method == SI_COMPUTE_CLEAR_METHOD) {