nir: Replace the scoped_memory barrier by a scoped_barrier
SPIRV OpControlBarrier can have both a memory and a control barrier which some hardware can handle with a single instruction. Let's turn the scoped_memory_barrier into a scoped barrier which can embed both barrier types. Note that control-only or memory-only barriers can be supported through this new intrinsic by passing NIR_SCOPE_NONE to the unused barrier type. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Suggested-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4900>
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@@ -786,6 +786,7 @@ print_intrinsic_instr(nir_intrinsic_instr *instr, print_state *state)
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[NIR_INTRINSIC_MEMORY_SEMANTICS] = "mem_semantics",
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[NIR_INTRINSIC_MEMORY_MODES] = "mem_modes",
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[NIR_INTRINSIC_MEMORY_SCOPE] = "mem_scope",
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[NIR_INTRINSIC_EXECUTION_SCOPE] = "exec_scope",
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};
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for (unsigned idx = 1; idx < NIR_INTRINSIC_NUM_INDEX_FLAGS; idx++) {
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if (!info->index_map[idx])
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@@ -896,9 +897,11 @@ print_intrinsic_instr(nir_intrinsic_instr *instr, print_state *state)
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break;
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}
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case NIR_INTRINSIC_EXECUTION_SCOPE:
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case NIR_INTRINSIC_MEMORY_SCOPE: {
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fprintf(fp, " mem_scope=");
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fprintf(fp, " %s=", index_name[idx]);
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switch (nir_intrinsic_memory_scope(instr)) {
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case NIR_SCOPE_NONE: fprintf(fp, "NONE"); break;
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case NIR_SCOPE_DEVICE: fprintf(fp, "DEVICE"); break;
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case NIR_SCOPE_QUEUE_FAMILY: fprintf(fp, "QUEUE_FAMILY"); break;
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case NIR_SCOPE_WORKGROUP: fprintf(fp, "WORKGROUP"); break;
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