ac,radv: do not emit vec3 for raw load/store on SI

It's unsupported, only load/store format with vec3 are supported.

Fixes: 6970a9a6ca ("ac,radv: remove the vec3 restriction with LLVM 9+")"
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

src/amd/vulkan/radv_nir_to_llvm.c

@@ -2764,7 +2764,7 @@ radv_emit_stream_output(struct radv_shader_context *ctx,
 		/* fall through */
 	case 4: /* as v4i32 */
 		vdata = ac_build_gather_values(&ctx->ac, out,
-					       HAVE_LLVM < 0x900 ?
+					       !ac_has_vec3_support(ctx->ac.chip_class, false) ?
 					       util_next_power_of_two(num_comps) :
 					       num_comps);
 		break;