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nir: add nir_intrinsic_load_lshs_vertex_stride_amd

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For loading LS-HS vertex stride by shader argument in radeonsi.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16418>
This commit is contained in:
Qiang Yu
2022-05-07 17:34:54 +08:00
committed by Marge Bot
parent e35ff669b5
commit 33b4b923ee
2 changed files with 4 additions and 0 deletions
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1
src/compiler/nir/nir_divergence_analysis.c
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@@ -176,6 +176,7 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr)
case nir_intrinsic_load_btd_local_arg_addr_intel: case nir_intrinsic_load_btd_local_arg_addr_intel:
case nir_intrinsic_load_mesh_inline_data_intel: case nir_intrinsic_load_mesh_inline_data_intel:
case nir_intrinsic_load_ray_num_dss_rt_stacks_intel: case nir_intrinsic_load_ray_num_dss_rt_stacks_intel:
case nir_intrinsic_load_lshs_vertex_stride_amd:
is_divergent = false; is_divergent = false;
break; break;

3
src/compiler/nir/nir_intrinsics.py
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@@ -1394,6 +1394,9 @@ intrinsic("load_shared2_amd", [1], dest_comp=2, indices=[OFFSET0, OFFSET1, ST64]
# src[] = { value, offset }. # src[] = { value, offset }.
intrinsic("store_shared2_amd", [2, 1], indices=[OFFSET0, OFFSET1, ST64]) intrinsic("store_shared2_amd", [2, 1], indices=[OFFSET0, OFFSET1, ST64])
# Vertex stride in LS-HS buffer
system_value("lshs_vertex_stride_amd", 1)
# V3D-specific instrinc for tile buffer color reads. # V3D-specific instrinc for tile buffer color reads.
# #
# The hardware requires that we read the samples and components of a pixel # The hardware requires that we read the samples and components of a pixel