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intel/compiler: rework input parameters

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Use a struct for various common parameters rather than per stage
structure or arguments to stage specific entrypoints.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23942>
This commit is contained in:
Lionel Landwerlin
2023-07-14 02:10:20 +03:00
committed by Marge Bot
parent df3f2c89f5
commit 3384f029be
36 changed files with 543 additions and 467 deletions
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10
src/intel/compiler/brw_fs_generator.cpp
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@@ -185,17 +185,17 @@ brw_reg_from_fs_reg(const struct intel_device_info *devinfo, fs_inst *inst,
return brw_reg;
}
fs_generator::fs_generator(const struct brw_compiler *compiler, void *log_data,
void *mem_ctx,
fs_generator::fs_generator(const struct brw_compiler *compiler,
const struct brw_compile_params *params,
struct brw_stage_prog_data *prog_data,
bool runtime_check_aads_emit,
gl_shader_stage stage)
: compiler(compiler), log_data(log_data),
: compiler(compiler), params(params),
devinfo(compiler->devinfo),
prog_data(prog_data), dispatch_width(0),
runtime_check_aads_emit(runtime_check_aads_emit), debug_flag(false),
shader_name(NULL), stage(stage), mem_ctx(mem_ctx)
shader_name(NULL), stage(stage), mem_ctx(params->mem_ctx)
{
p = rzalloc(mem_ctx, struct brw_codegen);
brw_init_codegen(&compiler->isa, p, mem_ctx);
@@ -2422,7 +2422,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width,
#endif
assert(validated);
brw_shader_debug_log(compiler, log_data,
brw_shader_debug_log(compiler, params->log_data,
"%s SIMD%d shader: %d inst, %d loops, %u cycles, "
"%d:%d spills:fills, %u sends, "
"scheduled with mode %s, "