nir: add a bit_size parameter to nir_ssa_dest_init
v2: Squash multiple commits addressing the new parameter in different files so we don't break the build (Iago) v3: Fix tgsi (Samuel) v4: Fix nir_clone.c (Samuel) v5: Fix vc4 and freedreno (Iago) v6 (Sam) - Fix build errors in nir_lower_indirect_derefs - Use helper to get type size from nir_alu_type. Signed-off-by: Iago Toral Quiroga <itoral@igalia.com> Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com> Tested-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
This commit is contained in:

committed by
Samuel Iglesias Gonsálvez

parent
084b24f558
commit
3124ce699b
@@ -164,6 +164,25 @@ nir_build_alu(nir_builder *build, nir_op op, nir_ssa_def *src0,
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}
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assert(num_components != 0);
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/* Figure out the bitwidth based on the source bitwidth if the instruction
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* is variable-width.
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*/
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unsigned bit_size = nir_alu_type_get_type_size(op_info->output_type);
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if (bit_size == 0) {
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for (unsigned i = 0; i < op_info->num_inputs; i++) {
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unsigned src_bit_size = instr->src[i].src.ssa->bit_size;
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if (nir_alu_type_get_type_size(op_info->input_types[i]) == 0) {
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if (bit_size)
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assert(src_bit_size == bit_size);
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else
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bit_size = src_bit_size;
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} else {
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assert(src_bit_size ==
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nir_alu_type_get_type_size(op_info->input_types[i]));
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}
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}
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}
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/* Make sure we don't swizzle from outside of our source vector (like if a
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* scalar value was passed into a multiply with a vector).
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*/
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@@ -173,7 +192,8 @@ nir_build_alu(nir_builder *build, nir_op op, nir_ssa_def *src0,
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}
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}
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nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components, NULL);
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nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components,
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bit_size, NULL);
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instr->dest.write_mask = (1 << num_components) - 1;
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nir_builder_instr_insert(build, &instr->instr);
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@@ -238,7 +258,8 @@ static inline nir_ssa_def *
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nir_fmov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
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{
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nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_fmov);
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nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components, NULL);
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nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
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nir_src_bit_size(src.src), NULL);
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mov->dest.write_mask = (1 << num_components) - 1;
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mov->src[0] = src;
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nir_builder_instr_insert(build, &mov->instr);
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@@ -250,7 +271,8 @@ static inline nir_ssa_def *
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nir_imov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
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{
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nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_imov);
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nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components, NULL);
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nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
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nir_src_bit_size(src.src), NULL);
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mov->dest.write_mask = (1 << num_components) - 1;
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mov->src[0] = src;
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nir_builder_instr_insert(build, &mov->instr);
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@@ -329,7 +351,8 @@ nir_load_var(nir_builder *build, nir_variable *var)
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nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_var);
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load->num_components = num_components;
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load->variables[0] = nir_deref_var_create(load, var);
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nir_ssa_dest_init(&load->instr, &load->dest, num_components, NULL);
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nir_ssa_dest_init(&load->instr, &load->dest, num_components,
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glsl_get_bit_size(glsl_get_base_type(var->type)), NULL);
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nir_builder_instr_insert(build, &load->instr);
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return &load->dest.ssa;
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}
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@@ -356,7 +379,7 @@ nir_load_system_value(nir_builder *build, nir_intrinsic_op op, int index)
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load->num_components = nir_intrinsic_infos[op].dest_components;
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load->const_index[0] = index;
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nir_ssa_dest_init(&load->instr, &load->dest,
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nir_intrinsic_infos[op].dest_components, NULL);
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nir_intrinsic_infos[op].dest_components, 32, NULL);
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nir_builder_instr_insert(build, &load->instr);
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return &load->dest.ssa;
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}
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