amd: mark more registers that need RESET_FILTER_CAM in PM4
For SQTT. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499>
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@@ -228,15 +228,37 @@ ac_pm4_cmd_add(struct ac_pm4_state *state, uint32_t dw)
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state->last_opcode = 255; /* invalid opcode */
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}
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static bool
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need_reset_filter_cam(const struct ac_pm4_state *state)
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{
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const struct radeon_info *info = state->info;
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/* All SET_*_PAIRS* packets on the gfx queue must set RESET_FILTER_CAM. */
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if (!state->is_compute_queue &&
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(opcode_is_pairs(state->last_opcode) ||
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opcode_is_pairs_packed(state->last_opcode)))
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return true;
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const uint32_t last_reg = state->last_reg << 2;
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if (info->gfx_level >= GFX11 && !state->is_compute_queue &&
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(last_reg + CIK_UCONFIG_REG_OFFSET == R_0367A4_SQ_THREAD_TRACE_BUF0_SIZE ||
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last_reg + CIK_UCONFIG_REG_OFFSET == R_0367A0_SQ_THREAD_TRACE_BUF0_BASE ||
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last_reg + CIK_UCONFIG_REG_OFFSET == R_0367B4_SQ_THREAD_TRACE_MASK ||
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last_reg + CIK_UCONFIG_REG_OFFSET == R_0367B8_SQ_THREAD_TRACE_TOKEN_MASK ||
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last_reg + CIK_UCONFIG_REG_OFFSET == R_0367B0_SQ_THREAD_TRACE_CTRL))
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return true;
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return false;
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}
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void
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ac_pm4_cmd_end(struct ac_pm4_state *state, bool predicate)
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{
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unsigned count;
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count = state->ndw - state->last_pm4 - 2;
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/* All SET_*_PAIRS* packets on the gfx queue must set RESET_FILTER_CAM. */
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bool reset_filter_cam = !state->is_compute_queue &&
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(opcode_is_pairs(state->last_opcode) ||
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opcode_is_pairs_packed(state->last_opcode));
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bool reset_filter_cam = need_reset_filter_cam(state);
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state->pm4[state->last_pm4] = PKT3(state->last_opcode, count, predicate) |
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PKT3_RESET_FILTER_CAM_S(reset_filter_cam);
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