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radv: Remove VS inputs code from LLVM backend.

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Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16805>
This commit is contained in:
Timur Kristóf
2023-02-10 23:48:33 +01:00
committed by Marge Bot
parent 3b0394d063
commit 2f78700f89
1 changed files with 0 additions and 174 deletions
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174
src/amd/vulkan/radv_nir_to_llvm.c
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@@ -255,178 +255,6 @@ radv_get_sampler_desc(struct ac_shader_abi *abi, LLVMValueRef index,
return radv_load_rsrc(ctx, index, v4 ? ctx->ac.v4i32 : ctx->ac.v8i32);
}
static LLVMValueRef
radv_fixup_vertex_input_fetches(struct radv_shader_context *ctx, LLVMValueRef value,
unsigned num_channels, bool is_float, bool is_64bit)
{
LLVMValueRef zero = is_64bit ? ctx->ac.i64_0 : (is_float ? ctx->ac.f32_0 : ctx->ac.i32_0);
LLVMValueRef one = is_64bit ? ctx->ac.i64_0 : (is_float ? ctx->ac.f32_1 : ctx->ac.i32_1);
LLVMValueRef chan[4];
if (LLVMGetTypeKind(LLVMTypeOf(value)) == LLVMVectorTypeKind) {
unsigned vec_size = LLVMGetVectorSize(LLVMTypeOf(value));
if (num_channels == 4 && num_channels == vec_size)
return value;
num_channels = MIN2(num_channels, vec_size);
for (unsigned i = 0; i < num_channels; i++)
chan[i] = ac_llvm_extract_elem(&ctx->ac, value, i);
} else {
assert(num_channels == 1);
chan[0] = value;
}
for (unsigned i = num_channels; i < 4; i++) {
chan[i] = i == 3 ? one : zero;
chan[i] = ac_to_integer(&ctx->ac, chan[i]);
}
return ac_build_gather_values(&ctx->ac, chan, 4);
}
static void
load_vs_input(struct radv_shader_context *ctx, unsigned driver_location, LLVMTypeRef dest_type,
LLVMValueRef out[4])
{
struct ac_llvm_pointer t_list_ptr = ac_get_ptr_arg(&ctx->ac, &ctx->args->ac, ctx->args->ac.vertex_buffers);
LLVMValueRef t_offset;
LLVMValueRef t_list;
LLVMValueRef input;
LLVMValueRef buffer_index;
unsigned attrib_index = driver_location - VERT_ATTRIB_GENERIC0;
enum pipe_format attrib_format = ctx->options->key.vs.vertex_attribute_formats[attrib_index];
const struct util_format_description *desc = util_format_description(attrib_format);
bool is_float = !desc->channel[0].pure_integer;
uint8_t input_usage_mask =
ctx->shader_info->vs.input_usage_mask[driver_location];
unsigned num_input_channels = util_last_bit(input_usage_mask);
if (ctx->options->key.vs.instance_rate_inputs & (1u << attrib_index)) {
uint32_t divisor = ctx->options->key.vs.instance_rate_divisors[attrib_index];
if (divisor) {
buffer_index = ctx->abi.instance_id;
if (divisor != 1) {
buffer_index = LLVMBuildUDiv(ctx->ac.builder, buffer_index,
LLVMConstInt(ctx->ac.i32, divisor, 0), "");
}
} else {
buffer_index = ctx->ac.i32_0;
}
buffer_index = LLVMBuildAdd(
ctx->ac.builder, ac_get_arg(&ctx->ac, ctx->args->ac.start_instance), buffer_index, "");
} else {
buffer_index = LLVMBuildAdd(ctx->ac.builder, ctx->abi.vertex_id,
ac_get_arg(&ctx->ac, ctx->args->ac.base_vertex), "");
}
const struct ac_vtx_format_info *vtx_info =
ac_get_vtx_format_info(GFX8, CHIP_POLARIS10, attrib_format);
/* Adjust the number of channels to load based on the vertex attribute format. */
unsigned num_channels = MIN2(num_input_channels, vtx_info->num_channels);
unsigned attrib_binding = ctx->options->key.vs.vertex_attribute_bindings[attrib_index];
unsigned attrib_offset = ctx->options->key.vs.vertex_attribute_offsets[attrib_index];
unsigned attrib_stride = ctx->options->key.vs.vertex_attribute_strides[attrib_index];
unsigned data_format = vtx_info->hw_format[num_channels - 1] & 0xf;
unsigned num_format = vtx_info->hw_format[0] >> 4;
unsigned desc_index =
ctx->shader_info->vs.use_per_attribute_vb_descs ? attrib_index : attrib_binding;
desc_index = util_bitcount(ctx->shader_info->vs.vb_desc_usage_mask &
u_bit_consecutive(0, desc_index));
t_offset = LLVMConstInt(ctx->ac.i32, desc_index, false);
t_list = ac_build_load_to_sgpr(&ctx->ac, t_list_ptr, t_offset);
/* Always split typed vertex buffer loads on GFX6 and GFX10+ to avoid any alignment issues that
* triggers memory violations and eventually a GPU hang. This can happen if the stride (static or
* dynamic) is unaligned and also if the VBO offset is aligned to a scalar (eg. stride is 8 and
* VBO offset is 2 for R16G16B16A16_SNORM).
*/
unsigned chan_dwords = vtx_info->chan_byte_size == 8 ? 2 : 1;
if (((ctx->ac.gfx_level == GFX6 || ctx->ac.gfx_level >= GFX10) && vtx_info->chan_byte_size) ||
!(vtx_info->has_hw_format & BITFIELD_BIT(vtx_info->num_channels - 1)) ||
vtx_info->element_size > 16) {
unsigned chan_format = vtx_info->hw_format[0] & 0xf;
LLVMValueRef values[4];
for (unsigned chan = 0; chan < num_channels; chan++) {
unsigned chan_offset = attrib_offset + chan * vtx_info->chan_byte_size;
LLVMValueRef chan_index = buffer_index;
if (attrib_stride != 0 && chan_offset > attrib_stride) {
LLVMValueRef buffer_offset =
LLVMConstInt(ctx->ac.i32, chan_offset / attrib_stride, false);
chan_index = LLVMBuildAdd(ctx->ac.builder, buffer_index, buffer_offset, "");
chan_offset = chan_offset % attrib_stride;
}
values[chan] = ac_build_struct_tbuffer_load(
&ctx->ac, t_list, chan_index, LLVMConstInt(ctx->ac.i32, chan_offset, false),
ctx->ac.i32_0, chan_dwords, chan_format, num_format, 0, true);
}
input = ac_build_gather_values(&ctx->ac, values, num_channels);
} else {
if (attrib_stride != 0 && attrib_offset > attrib_stride) {
LLVMValueRef buffer_offset =
LLVMConstInt(ctx->ac.i32, attrib_offset / attrib_stride, false);
buffer_index = LLVMBuildAdd(ctx->ac.builder, buffer_index, buffer_offset, "");
attrib_offset = attrib_offset % attrib_stride;
}
input = ac_build_struct_tbuffer_load(
&ctx->ac, t_list, buffer_index, LLVMConstInt(ctx->ac.i32, attrib_offset, false),
ctx->ac.i32_0, num_channels * chan_dwords, data_format, num_format, 0, true);
}
if (vtx_info->chan_byte_size == 8)
input =
LLVMBuildBitCast(ctx->ac.builder, input, LLVMVectorType(ctx->ac.i64, num_channels), "");
input = radv_fixup_vertex_input_fetches(ctx, input, num_channels, is_float,
vtx_info->chan_byte_size == 8);
for (unsigned chan = 0; chan < 4; chan++) {
LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, chan, false);
out[chan] = LLVMBuildExtractElement(ctx->ac.builder, input, llvm_chan, "");
if (dest_type == ctx->ac.i16 && is_float) {
out[chan] = LLVMBuildBitCast(ctx->ac.builder, out[chan], ctx->ac.f32, "");
out[chan] = LLVMBuildFPTrunc(ctx->ac.builder, out[chan], ctx->ac.f16, "");
}
}
for (unsigned chan = 0; chan < 4; chan++) {
out[chan] = ac_to_integer(&ctx->ac, out[chan]);
if (dest_type == ctx->ac.i16 && !is_float)
out[chan] = LLVMBuildTrunc(ctx->ac.builder, out[chan], ctx->ac.i16, "");
}
}
static LLVMValueRef
radv_load_vs_inputs(struct ac_shader_abi *abi, unsigned driver_location, unsigned component,
unsigned num_components, unsigned vertex_index, LLVMTypeRef type)
{
struct radv_shader_context *ctx = radv_shader_context_from_abi(abi);
LLVMValueRef values[4];
load_vs_input(ctx, driver_location, type, values);
for (unsigned i = 0; i < 4; i++)
values[i] = LLVMBuildBitCast(ctx->ac.builder, values[i], type, "");
return ac_build_varying_gather_values(&ctx->ac, values, num_components, component);
}
static void
prepare_interp_optimize(struct radv_shader_context *ctx, struct nir_shader *nir)
{
@@ -958,8 +786,6 @@ ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm,
if (shaders[shader_idx]->info.stage == MESA_SHADER_GEOMETRY && !ctx.shader_info->is_ngg) {
ctx.abi.emit_vertex_with_counter = visit_emit_vertex_with_counter;
ctx.abi.emit_primitive = visit_end_primitive;
} else if (shaders[shader_idx]->info.stage == MESA_SHADER_VERTEX) {
ctx.abi.load_inputs = radv_load_vs_inputs;
}
if (shader_idx && !(shaders[shader_idx]->info.stage == MESA_SHADER_GEOMETRY && info->is_ngg)) {