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radeonsi: don't assume that TC_ACTION_ENA invalidates L1 cache on gfx9

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Just got into a midnight discussion with a hw guy.
TC_ACTION_ENA apparently doesn't invalidate L1, so don't clear
the INV_VCACHE flag.

Fixes: 4056e953fe - radeonsi: move emit_cache_flush functions into si_gfx_cs.c

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17902>
(cherry picked from commit 279315fd73)
This commit is contained in:
Marek Olšák
2022-08-04 02:09:23 -04:00
committed by Dylan Baker
parent eadc134dd8
commit 2f18e16512
2 changed files with 3 additions and 3 deletions
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2
.pick_status.json
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@@ -202,7 +202,7 @@
"description": "radeonsi: don't assume that TC_ACTION_ENA invalidates L1 cache on gfx9",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "4056e953fe43bd667e1812c1c7075285d24b42c2"
},

4
src/gallium/drivers/radeonsi/si_gfx_cs.c
View File

@@ -1027,7 +1027,7 @@ void si_emit_cache_flush(struct si_context *sctx, struct radeon_cmdbuf *cs)
* All operations that invalidate L2 also seem to invalidate
* metadata. Volatile (VOL) and WC flushes are not listed here.
*
* TC | TC_WB = writeback & invalidate L2 & L1
* TC | TC_WB = writeback & invalidate L2
* TC | TC_WB | TC_NC = writeback & invalidate L2 for MTYPE == NC
* TC_WB | TC_NC = writeback L2 for MTYPE == NC
* TC | TC_NC = invalidate L2 for MTYPE == NC
@@ -1046,7 +1046,7 @@ void si_emit_cache_flush(struct si_context *sctx, struct radeon_cmdbuf *cs)
tc_flags = EVENT_TC_ACTION_ENA | EVENT_TC_WB_ACTION_ENA;
/* Clear the flags. */
flags &= ~(SI_CONTEXT_INV_L2 | SI_CONTEXT_WB_L2 | SI_CONTEXT_INV_VCACHE);
flags &= ~(SI_CONTEXT_INV_L2 | SI_CONTEXT_WB_L2);
sctx->num_L2_invalidates++;
}