radv: move streamout_shader to radv_graphics_pipeline
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16688>
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@@ -8924,7 +8924,7 @@ radv_emit_streamout_enable(struct radv_cmd_buffer *cmd_buffer)
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{
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struct radv_streamout_state *so = &cmd_buffer->state.streamout;
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struct radv_graphics_pipeline *pipeline = cmd_buffer->state.graphics_pipeline;
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struct radv_shader_info *info = &pipeline->base.streamout_shader->info;
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struct radv_shader_info *info = &pipeline->streamout_shader->info;
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struct radeon_cmdbuf *cs = cmd_buffer->cs;
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radeon_set_context_reg_seq(cs, R_028B94_VGT_STRMOUT_CONFIG, 2);
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@@ -9004,7 +9004,7 @@ radv_emit_streamout_begin(struct radv_cmd_buffer *cmd_buffer, uint32_t firstCoun
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struct radv_streamout_binding *sb = cmd_buffer->streamout_bindings;
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struct radv_streamout_state *so = &cmd_buffer->state.streamout;
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struct radv_graphics_pipeline *pipeline = cmd_buffer->state.graphics_pipeline;
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struct radv_shader_info *info = &pipeline->base.streamout_shader->info;
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struct radv_shader_info *info = &pipeline->streamout_shader->info;
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struct radeon_cmdbuf *cs = cmd_buffer->cs;
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radv_flush_vgt_streamout(cmd_buffer);
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@@ -6398,7 +6398,7 @@ radv_pipeline_emit_vgt_shader_config(struct radeon_cmdbuf *ctx_cs,
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if (radv_pipeline_has_ngg(pipeline)) {
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stages |= S_028B54_PRIMGEN_EN(1);
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if (pipeline->base.streamout_shader)
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if (pipeline->streamout_shader)
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stages |= S_028B54_NGG_WAVE_ID_EN(1);
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if (radv_pipeline_has_ngg_passthrough(pipeline))
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stages |= S_028B54_PRIMGEN_PASSTHRU_EN(1);
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@@ -6700,12 +6700,12 @@ radv_pipeline_init_vertex_input_state(struct radv_graphics_pipeline *pipeline,
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}
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static struct radv_shader *
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radv_pipeline_get_streamout_shader(struct radv_pipeline *pipeline)
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radv_pipeline_get_streamout_shader(struct radv_graphics_pipeline *pipeline)
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{
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int i;
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for (i = MESA_SHADER_GEOMETRY; i >= MESA_SHADER_VERTEX; i--) {
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struct radv_shader *shader = radv_get_shader(pipeline, i);
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struct radv_shader *shader = radv_get_shader(&pipeline->base, i);
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if (shader && shader->info.so.num_outputs > 0)
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return shader;
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@@ -6945,7 +6945,7 @@ radv_graphics_pipeline_init(struct radv_graphics_pipeline *pipeline, struct radv
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radv_pipeline_init_scratch(device, &pipeline->base);
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/* Find the last vertex shader stage that eventually uses streamout. */
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pipeline->base.streamout_shader = radv_pipeline_get_streamout_shader(&pipeline->base);
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pipeline->streamout_shader = radv_pipeline_get_streamout_shader(pipeline);
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pipeline->is_ngg = radv_pipeline_has_ngg(pipeline);
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pipeline->has_ngg_culling =
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@@ -1948,9 +1948,6 @@ struct radv_pipeline {
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unsigned max_waves;
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unsigned scratch_bytes_per_wave;
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/* Not NULL if graphics pipeline uses streamout. */
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struct radv_shader *streamout_shader;
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/* Unique pipeline hash identifier. */
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uint64_t pipeline_hash;
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@@ -2012,6 +2009,9 @@ struct radv_graphics_pipeline {
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/* Whether the pipeline uses NGG (GFX10+). */
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bool is_ngg;
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bool has_ngg_culling;
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/* Not NULL if graphics pipeline uses streamout. */
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struct radv_shader *streamout_shader;
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};
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struct radv_compute_pipeline {
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