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i965/gen6+: enable EXT_polygon_offset_clamp

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Replace the hard-coded 0's with the context clamp value.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Ilia Mirkin
2014-12-31 02:15:23 -05:00
parent 81998dda63
commit 2ce29ce5af
5 changed files with 5 additions and 3 deletions
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1
docs/relnotes/10.5.0.html
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@@ -47,6 +47,7 @@ Note: some of the new features are only available with certain drivers.
<li>GL_ARB_framebuffer_sRGB on freedreno</li> <li>GL_ARB_framebuffer_sRGB on freedreno</li>
<li>GL_ARB_texture_rg on freedreno</li> <li>GL_ARB_texture_rg on freedreno</li>
<li>GL_EXT_packed_float on freedreno</li> <li>GL_EXT_packed_float on freedreno</li>
<li>GL_EXT_polygon_offset_clamp on i965</li>
<li>GL_EXT_texture_shared_exponent on freedreno</li> <li>GL_EXT_texture_shared_exponent on freedreno</li>
<li>GL_EXT_texture_snorm on freedreno</li> <li>GL_EXT_texture_snorm on freedreno</li>
</ul> </ul>

2
src/mesa/drivers/dri/i965/gen6_sf_state.c
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@@ -427,7 +427,7 @@ upload_sf_state(struct brw_context *brw)
OUT_BATCH(dw4); OUT_BATCH(dw4);
OUT_BATCH_F(ctx->Polygon.OffsetUnits * 2); /* constant. copied from gen4 */ OUT_BATCH_F(ctx->Polygon.OffsetUnits * 2); /* constant. copied from gen4 */
OUT_BATCH_F(ctx->Polygon.OffsetFactor); /* scale */ OUT_BATCH_F(ctx->Polygon.OffsetFactor); /* scale */
OUT_BATCH_F(0.0); /* XXX: global depth offset clamp */ OUT_BATCH_F(ctx->Polygon.OffsetClamp); /* global depth offset clamp */
for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) {
OUT_BATCH(attr_overrides[i * 2] | attr_overrides[i * 2 + 1] << 16); OUT_BATCH(attr_overrides[i * 2] | attr_overrides[i * 2 + 1] << 16);
} }

2
src/mesa/drivers/dri/i965/gen7_sf_state.c
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@@ -242,7 +242,7 @@ upload_sf_state(struct brw_context *brw)
OUT_BATCH(dw3); OUT_BATCH(dw3);
OUT_BATCH_F(ctx->Polygon.OffsetUnits * 2); /* constant. copied from gen4 */ OUT_BATCH_F(ctx->Polygon.OffsetUnits * 2); /* constant. copied from gen4 */
OUT_BATCH_F(ctx->Polygon.OffsetFactor); /* scale */ OUT_BATCH_F(ctx->Polygon.OffsetFactor); /* scale */
OUT_BATCH_F(0.0); /* XXX: global depth offset clamp */ OUT_BATCH_F(ctx->Polygon.OffsetClamp); /* global depth offset clamp */
ADVANCE_BATCH(); ADVANCE_BATCH();
} }

2
src/mesa/drivers/dri/i965/gen8_sf_state.c
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@@ -314,7 +314,7 @@ upload_raster(struct brw_context *brw)
OUT_BATCH(dw1); OUT_BATCH(dw1);
OUT_BATCH_F(ctx->Polygon.OffsetUnits * 2); /* constant. copied from gen4 */ OUT_BATCH_F(ctx->Polygon.OffsetUnits * 2); /* constant. copied from gen4 */
OUT_BATCH_F(ctx->Polygon.OffsetFactor); /* scale */ OUT_BATCH_F(ctx->Polygon.OffsetFactor); /* scale */
OUT_BATCH_F(0.0); OUT_BATCH_F(ctx->Polygon.OffsetClamp); /* global depth offset clamp */
ADVANCE_BATCH(); ADVANCE_BATCH();
} }

1
src/mesa/drivers/dri/i965/intel_extensions.c
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@@ -285,6 +285,7 @@ intelInitExtensions(struct gl_context *ctx)
ctx->Extensions.ARB_texture_gather = true; ctx->Extensions.ARB_texture_gather = true;
ctx->Extensions.ARB_conditional_render_inverted = true; ctx->Extensions.ARB_conditional_render_inverted = true;
ctx->Extensions.AMD_vertex_shader_layer = true; ctx->Extensions.AMD_vertex_shader_layer = true;
ctx->Extensions.EXT_polygon_offset_clamp = true;
/* Test if the kernel has the ioctl. */ /* Test if the kernel has the ioctl. */
if (drm_intel_reg_read(brw->bufmgr, TIMESTAMP, &dummy) == 0) if (drm_intel_reg_read(brw->bufmgr, TIMESTAMP, &dummy) == 0)