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radv: Split and move buffer robustness to shader key

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Will be used by pipeline robustness.

There is also loads of space in the first dword.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912>
This commit is contained in:
Joshua Ashton
2023-06-28 18:31:51 +01:00
parent 3e36b47b96
commit 2c6125c1c5
4 changed files with 25 additions and 22 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
src/amd/vulkan/radv_pipeline.c
View File

@@ -179,6 +179,10 @@ radv_generate_pipeline_key(const struct radv_device *device, const struct radv_p
} }
} }
key.storage_robustness = device->buffer_robustness;
key.uniform_robustness = device->buffer_robustness;
key.vertex_robustness = device->buffer_robustness;
return key; return key;
} }
@@ -203,10 +207,6 @@ radv_get_hash_flags(const struct radv_device *device, bool stats)
hash_flags |= RADV_HASH_SHADER_LLVM; hash_flags |= RADV_HASH_SHADER_LLVM;
if (stats) if (stats)
hash_flags |= RADV_HASH_SHADER_KEEP_STATISTICS; hash_flags |= RADV_HASH_SHADER_KEEP_STATISTICS;
if (device->buffer_robustness >= RADV_BUFFER_ROBUSTNESS_1) /* forces per-attribute vertex descriptors */
hash_flags |= RADV_HASH_SHADER_ROBUST_BUFFER_ACCESS;
if (device->buffer_robustness >= RADV_BUFFER_ROBUSTNESS_2) /* affects load/store vectorizer */
hash_flags |= RADV_HASH_SHADER_ROBUST_BUFFER_ACCESS2;
if (device->instance->debug_flags & RADV_DEBUG_SPLIT_FMA) if (device->instance->debug_flags & RADV_DEBUG_SPLIT_FMA)
hash_flags |= RADV_HASH_SHADER_SPLIT_FMA; hash_flags |= RADV_HASH_SHADER_SPLIT_FMA;
if (device->instance->debug_flags & RADV_DEBUG_NO_FMASK) if (device->instance->debug_flags & RADV_DEBUG_NO_FMASK)
@@ -509,9 +509,11 @@ radv_postprocess_nir(struct radv_device *device, const struct radv_pipeline_layo
.has_shared2_amd = gfx_level >= GFX7, .has_shared2_amd = gfx_level >= GFX7,
}; };
if (device->buffer_robustness >= RADV_BUFFER_ROBUSTNESS_2) { if (pipeline_key->uniform_robustness >= RADV_BUFFER_ROBUSTNESS_2)
vectorize_opts.robust_modes = nir_var_mem_ubo | nir_var_mem_ssbo; vectorize_opts.robust_modes |= nir_var_mem_ubo;
}
if (pipeline_key->storage_robustness >= RADV_BUFFER_ROBUSTNESS_2)
vectorize_opts.robust_modes |= nir_var_mem_ssbo;
if (!pipeline_key->optimisations_disabled) { if (!pipeline_key->optimisations_disabled) {
progress = false; progress = false;

26
src/amd/vulkan/radv_private.h
View File

@@ -2115,20 +2115,18 @@ struct radv_event {
uint64_t *map; uint64_t *map;
}; };
#define RADV_HASH_SHADER_CS_WAVE32 (1 << 1) #define RADV_HASH_SHADER_CS_WAVE32 (1 << 1)
#define RADV_HASH_SHADER_PS_WAVE32 (1 << 2) #define RADV_HASH_SHADER_PS_WAVE32 (1 << 2)
#define RADV_HASH_SHADER_GE_WAVE32 (1 << 3) #define RADV_HASH_SHADER_GE_WAVE32 (1 << 3)
#define RADV_HASH_SHADER_LLVM (1 << 4) #define RADV_HASH_SHADER_LLVM (1 << 4)
#define RADV_HASH_SHADER_KEEP_STATISTICS (1 << 8) #define RADV_HASH_SHADER_KEEP_STATISTICS (1 << 8)
#define RADV_HASH_SHADER_USE_NGG_CULLING (1 << 13) #define RADV_HASH_SHADER_USE_NGG_CULLING (1 << 13)
#define RADV_HASH_SHADER_ROBUST_BUFFER_ACCESS (1 << 14) #define RADV_HASH_SHADER_EMULATE_RT (1 << 16)
#define RADV_HASH_SHADER_ROBUST_BUFFER_ACCESS2 (1 << 15) #define RADV_HASH_SHADER_SPLIT_FMA (1 << 17)
#define RADV_HASH_SHADER_EMULATE_RT (1 << 16) #define RADV_HASH_SHADER_RT_WAVE64 (1 << 18)
#define RADV_HASH_SHADER_SPLIT_FMA (1 << 17) #define RADV_HASH_SHADER_NO_FMASK (1 << 19)
#define RADV_HASH_SHADER_RT_WAVE64 (1 << 18) #define RADV_HASH_SHADER_NGG_STREAMOUT (1 << 20)
#define RADV_HASH_SHADER_NO_FMASK (1 << 19) #define RADV_HASH_SHADER_NO_RT (1 << 21)
#define RADV_HASH_SHADER_NGG_STREAMOUT (1 << 20)
#define RADV_HASH_SHADER_NO_RT (1 << 21)
struct radv_pipeline_key; struct radv_pipeline_key;
struct radv_ray_tracing_group; struct radv_ray_tracing_group;

3
src/amd/vulkan/radv_shader.h
View File

@@ -93,6 +93,9 @@ struct radv_pipeline_key {
uint32_t unknown_rast_prim : 1; uint32_t unknown_rast_prim : 1;
struct radv_required_subgroup_info subgroups[MESA_VULKAN_SHADER_STAGES]; struct radv_required_subgroup_info subgroups[MESA_VULKAN_SHADER_STAGES];
uint32_t storage_robustness : 2;
uint32_t uniform_robustness : 2;
uint32_t vertex_robustness : 2;
struct { struct {
uint32_t instance_rate_inputs; uint32_t instance_rate_inputs;

2
src/amd/vulkan/radv_shader_info.c
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@@ -415,7 +415,7 @@ gather_shader_info_vs(struct radv_device *device, const nir_shader *nir, const s
/* Use per-attribute vertex descriptors to prevent faults and for correct bounds checking. */ /* Use per-attribute vertex descriptors to prevent faults and for correct bounds checking. */
info->vs.use_per_attribute_vb_descs = info->vs.use_per_attribute_vb_descs =
device->buffer_robustness >= RADV_BUFFER_ROBUSTNESS_1 || info->vs.dynamic_inputs; pipeline_key->vertex_robustness >= RADV_BUFFER_ROBUSTNESS_1 || info->vs.dynamic_inputs;
/* We have to ensure consistent input register assignments between the main shader and the /* We have to ensure consistent input register assignments between the main shader and the
* prolog. * prolog.