radeonsi: don't leak an index buffer if draw_vbo fails
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
@@ -1372,7 +1372,7 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
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}
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if (sctx->do_update_shaders && !si_update_shaders(sctx))
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return;
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goto return_cleanup;
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if (index_size) {
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/* Translate or upload, if needed. */
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@@ -1454,7 +1454,7 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
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* need_cs_space flush before we add buffers to the buffer list.
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*/
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if (!si_upload_vertex_buffer_descriptors(sctx))
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return;
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goto return_cleanup;
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/* Use optimal packet order based on whether we need to sync the pipeline. */
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if (unlikely(sctx->flags & (SI_CONTEXT_FLUSH_AND_INV_CB |
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@@ -1472,7 +1472,7 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
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masked_atoms |= si_get_atom_bit(sctx, &sctx->atoms.s.render_cond);
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if (!si_upload_graphics_shader_descriptors(sctx))
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return;
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goto return_cleanup;
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/* Emit all states except possibly render condition. */
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si_emit_all_states(sctx, info, masked_atoms);
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@@ -1539,6 +1539,8 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
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if (G_0286E8_WAVESIZE(sctx->spi_tmpring_size))
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sctx->num_spill_draw_calls++;
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}
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return_cleanup:
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if (index_size && indexbuf != info->index.resource)
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pipe_resource_reference(&indexbuf, NULL);
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}
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