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nir,radv/aco: add and use pass to lower make available/visible barriers

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Lower them to ACCESS_COHERENT to simplify the backend and
probably give better performance than invalidating or writing back the
entire L0/L1 cache.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4905>
This commit is contained in:
Rhys Perry
2020-05-01 14:32:31 +01:00
committed by Marge Bot
parent 7a61480613
commit 2adb337256
5 changed files with 274 additions and 0 deletions
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src/amd/vulkan/radv_pipeline.c
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@@ -2943,6 +2943,7 @@ VkResult radv_create_shaders(struct radv_pipeline *pipeline,
nir_lower_non_uniform_ssbo_access |
nir_lower_non_uniform_texture_access |
nir_lower_non_uniform_image_access);
NIR_PASS_V(nir[i], nir_lower_memory_model);
}
}
}