From 2a71e332aa03d81f26f46cad8c7703d0ffa3ebf0 Mon Sep 17 00:00:00 2001 From: Erik Faye-Lund Date: Fri, 2 Jun 2023 20:12:29 +0200 Subject: [PATCH] nir: use new immediate comparison helpers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There's plenty of places we can use these new and shiny helpers, so let's clean up the code a bit. Reviewed-by: Alyssa Rosenzweig Reviewed-by: Faith Ekstrand Reviewed-by: Timur Kristóf Part-of: --- src/amd/common/ac_nir_cull.c | 4 ++-- src/amd/common/ac_nir_lower_ngg.c | 2 +- src/amd/vulkan/meta/radv_meta_etc_decode.c | 6 +++--- src/amd/vulkan/radv_rt_common.c | 4 ++-- src/broadcom/compiler/v3d_nir_lower_line_smooth.c | 2 +- src/compiler/nir/nir_format_convert.h | 4 ++-- src/compiler/nir/nir_lower_double_ops.c | 2 +- src/compiler/nir/nir_lower_int64.c | 4 ++-- src/gallium/drivers/d3d12/d3d12_gs_variant.cpp | 4 ++-- src/gallium/drivers/r600/sfn/sfn_nir_lower_64bit.cpp | 4 ++-- src/gallium/drivers/radeonsi/si_nir_lower_vs_inputs.c | 2 +- src/intel/compiler/brw_nir_lower_storage_image.c | 4 ++-- src/intel/compiler/brw_nir_tcs_workarounds.c | 6 +++--- src/intel/vulkan/anv_nir_lower_ubo_loads.c | 3 +-- src/intel/vulkan_hasvk/anv_nir_lower_ubo_loads.c | 3 +-- src/mesa/program/prog_to_nir.c | 2 +- src/mesa/state_tracker/st_atifs_to_nir.c | 2 +- src/mesa/state_tracker/st_draw_hw_select.c | 4 ++-- src/microsoft/compiler/dxil_nir.c | 2 +- src/microsoft/vulkan/dzn_nir.c | 4 ++-- 20 files changed, 33 insertions(+), 35 deletions(-) diff --git a/src/amd/common/ac_nir_cull.c b/src/amd/common/ac_nir_cull.c index 06fa2a13e27..0847c7dfddd 100644 --- a/src/amd/common/ac_nir_cull.c +++ b/src/amd/common/ac_nir_cull.c @@ -46,7 +46,7 @@ cull_face_triangle(nir_builder *b, nir_ssa_def *pos[3][4], const position_w_info det = nir_bcsel(b, w_info->w_reflection, nir_fneg(b, det), det); - nir_ssa_def *front_facing_ccw = nir_flt(b, nir_imm_float(b, 0.0f), det); + nir_ssa_def *front_facing_ccw = nir_fgt_imm(b, det, 0.0f); nir_ssa_def *zero_area = nir_feq_imm(b, det, 0.0f); nir_ssa_def *ccw = nir_load_cull_ccw_amd(b); nir_ssa_def *front_facing = nir_ieq(b, front_facing_ccw, ccw); @@ -78,7 +78,7 @@ cull_frustrum(nir_builder *b, nir_ssa_def *bbox_min[2], nir_ssa_def *bbox_max[2] for (unsigned chan = 0; chan < 2; ++chan) { prim_outside_view = nir_ior(b, prim_outside_view, nir_flt_imm(b, bbox_max[chan], -1.0f)); - prim_outside_view = nir_ior(b, prim_outside_view, nir_flt(b, nir_imm_float(b, 1.0f), bbox_min[chan])); + prim_outside_view = nir_ior(b, prim_outside_view, nir_fgt_imm(b, bbox_min[chan], 1.0f)); } return prim_outside_view; diff --git a/src/amd/common/ac_nir_lower_ngg.c b/src/amd/common/ac_nir_lower_ngg.c index 6fb2a19f7a5..fa29bde51e0 100644 --- a/src/amd/common/ac_nir_lower_ngg.c +++ b/src/amd/common/ac_nir_lower_ngg.c @@ -2046,7 +2046,7 @@ ngg_nogs_build_streamout(nir_builder *b, lower_ngg_nogs_state *s) for (unsigned i = 0; i < s->options->num_vertices_per_primitive; i++) { nir_if *if_valid_vertex = - nir_push_if(b, nir_ilt(b, nir_imm_int(b, i), num_vert_per_prim)); + nir_push_if(b, nir_igt_imm(b, num_vert_per_prim, i)); { nir_ssa_def *vtx_lds_idx = nir_load_var(b, s->gs_vtx_indices_vars[i]); nir_ssa_def *vtx_lds_addr = pervertex_lds_addr(b, vtx_lds_idx, vtx_lds_stride); diff --git a/src/amd/vulkan/meta/radv_meta_etc_decode.c b/src/amd/vulkan/meta/radv_meta_etc_decode.c index a9295af8fea..12218d3bfef 100644 --- a/src/amd/vulkan/meta/radv_meta_etc_decode.c +++ b/src/amd/vulkan/meta/radv_meta_etc_decode.c @@ -310,7 +310,7 @@ build_shader(struct radv_device *dev) nir_ssa_def *g1 = nir_iadd(&b, gb, gd); nir_ssa_def *b1 = nir_iadd(&b, bb, bd); - nir_push_if(&b, nir_ult(&b, nir_imm_int(&b, 31), r1)); + nir_push_if(&b, nir_ugt_imm(&b, r1, 31)); { nir_ssa_def *r0 = nir_ior(&b, nir_ubfe_imm(&b, color_y, 24, 2), nir_ishl_imm(&b, nir_ubfe_imm(&b, color_y, 27, 2), 2)); @@ -342,7 +342,7 @@ build_shader(struct radv_device *dev) nir_pop_if(&b, NULL); } nir_push_else(&b, NULL); - nir_push_if(&b, nir_ult(&b, nir_imm_int(&b, 31), g1)); + nir_push_if(&b, nir_ugt_imm(&b, g1, 31)); { nir_ssa_def *r0 = nir_ubfe_imm(&b, color_y, 27, 4); nir_ssa_def *g0 = nir_ior(&b, nir_ishl_imm(&b, nir_ubfe_imm(&b, color_y, 24, 3), 1), @@ -373,7 +373,7 @@ build_shader(struct radv_device *dev) 0x1); } nir_push_else(&b, NULL); - nir_push_if(&b, nir_ult(&b, nir_imm_int(&b, 31), b1)); + nir_push_if(&b, nir_ugt_imm(&b, b1, 31)); { nir_ssa_def *r0 = nir_ubfe_imm(&b, color_y, 25, 6); nir_ssa_def *g0 = nir_ior(&b, nir_ubfe_imm(&b, color_y, 17, 6), diff --git a/src/amd/vulkan/radv_rt_common.c b/src/amd/vulkan/radv_rt_common.c index e5eee2c6168..603ef6163c5 100644 --- a/src/amd/vulkan/radv_rt_common.c +++ b/src/amd/vulkan/radv_rt_common.c @@ -312,7 +312,7 @@ intersect_ray_amd_software_tri(struct radv_device *device, nir_builder *b, nir_s nir_flt_imm(b, w, 0.0f)); nir_ssa_def *cond_front = nir_ior( - b, nir_ior(b, nir_flt(b, nir_imm_float(b, 0.0f), u), nir_flt(b, nir_imm_float(b, 0.0f), v)), + b, nir_ior(b, nir_fgt_imm(b, u, 0.0f), nir_fgt_imm(b, v, 0.0f)), nir_flt(b, nir_imm_float(b, 0.0f), w)); nir_ssa_def *cond = nir_inot(b, nir_iand(b, cond_back, cond_front)); @@ -435,7 +435,7 @@ insert_traversal_triangle_case(struct radv_device *device, nir_builder *b, nir_push_if(b, nir_flt(b, intersection.t, nir_load_deref(b, args->vars.tmax))); { - intersection.frontface = nir_flt(b, nir_imm_float(b, 0), div); + intersection.frontface = nir_fgt_imm(b, div, 0); nir_ssa_def *switch_ccw = nir_test_mask(b, nir_load_deref(b, args->vars.sbt_offset_and_flags), RADV_INSTANCE_TRIANGLE_FLIP_FACING); intersection.frontface = nir_ixor(b, intersection.frontface, switch_ccw); diff --git a/src/broadcom/compiler/v3d_nir_lower_line_smooth.c b/src/broadcom/compiler/v3d_nir_lower_line_smooth.c index 123a899fe4d..6b2bb78e974 100644 --- a/src/broadcom/compiler/v3d_nir_lower_line_smooth.c +++ b/src/broadcom/compiler/v3d_nir_lower_line_smooth.c @@ -121,7 +121,7 @@ initialise_coverage_var(struct lower_line_smooth_state *state, 0.5f)))); /* Discard fragments that aren’t covered at all by the line */ - nir_ssa_def *outside = nir_fge(&b, nir_imm_float(&b, 0.0f), coverage); + nir_ssa_def *outside = nir_fle_imm(&b, coverage, 0.0f); nir_discard_if(&b, outside); diff --git a/src/compiler/nir/nir_format_convert.h b/src/compiler/nir/nir_format_convert.h index a825fc77ac6..68c5b59854c 100644 --- a/src/compiler/nir/nir_format_convert.h +++ b/src/compiler/nir/nir_format_convert.h @@ -320,7 +320,7 @@ nir_format_srgb_to_linear(nir_builder *b, nir_ssa_def *c) 1.0 / 1.055f), nir_imm_float(b, 2.4f)); - return nir_fsat(b, nir_bcsel(b, nir_fge(b, nir_imm_float(b, 0.04045f), c), + return nir_fsat(b, nir_bcsel(b, nir_fle_imm(b, c, 0.04045f), linear, curved)); } @@ -412,7 +412,7 @@ nir_format_pack_r9g9b9e5(nir_builder *b, nir_ssa_def *color) nir_ssa_def *clamped = nir_fmin(b, color, nir_imm_float(b, MAX_RGB9E5)); /* Get rid of negatives and NaN */ - clamped = nir_bcsel(b, nir_ult(b, nir_imm_int(b, 0x7f800000), color), + clamped = nir_bcsel(b, nir_ugt_imm(b, color, 0x7f800000), nir_imm_float(b, 0), clamped); /* maxrgb.u = MAX3(rc.u, gc.u, bc.u); */ diff --git a/src/compiler/nir/nir_lower_double_ops.c b/src/compiler/nir/nir_lower_double_ops.c index cd4dcfa7522..77644ef9f06 100644 --- a/src/compiler/nir/nir_lower_double_ops.c +++ b/src/compiler/nir/nir_lower_double_ops.c @@ -98,7 +98,7 @@ fix_inv_result(nir_builder *b, nir_ssa_def *res, nir_ssa_def *src, * denorms properly. Note that this doesn't preserve positive/negative * zeros, but GLSL doesn't require it. */ - res = nir_bcsel(b, nir_ior(b, nir_ige(b, nir_imm_int(b, 0), exp), + res = nir_bcsel(b, nir_ior(b, nir_ile_imm(b, exp, 0), nir_feq_imm(b, nir_fabs(b, src), INFINITY)), nir_imm_double(b, 0.0f), res); diff --git a/src/compiler/nir/nir_lower_int64.c b/src/compiler/nir/nir_lower_int64.c index 4e4a64b7d74..6b64dd65f1f 100644 --- a/src/compiler/nir/nir_lower_int64.c +++ b/src/compiler/nir/nir_lower_int64.c @@ -547,7 +547,7 @@ lower_udiv64_mod64(nir_builder *b, nir_ssa_def *n, nir_ssa_def *d, * in the last iteration. */ cond = nir_iand(b, cond, - nir_ige(b, nir_imm_int(b, 31 - i), log2_d_lo)); + nir_ile_imm(b, log2_d_lo, 31 - i)); } n_hi = nir_bcsel(b, cond, new_n_hi, n_hi); q_hi = nir_bcsel(b, cond, new_q_hi, q_hi); @@ -576,7 +576,7 @@ lower_udiv64_mod64(nir_builder *b, nir_ssa_def *n, nir_ssa_def *d, * in the last iteration. */ cond = nir_iand(b, cond, - nir_ige(b, nir_imm_int(b, 31 - i), log2_denom)); + nir_ile_imm(b, log2_denom, 31 - i)); } n = nir_bcsel(b, cond, new_n, n); q_lo = nir_bcsel(b, cond, new_q_lo, q_lo); diff --git a/src/gallium/drivers/d3d12/d3d12_gs_variant.cpp b/src/gallium/drivers/d3d12/d3d12_gs_variant.cpp index e2a0e77b54e..7cd61b937c8 100644 --- a/src/gallium/drivers/d3d12/d3d12_gs_variant.cpp +++ b/src/gallium/drivers/d3d12/d3d12_gs_variant.cpp @@ -47,9 +47,9 @@ nir_cull_face(nir_builder *b, nir_variable *vertices, bool ccw) nir_fsub(b, v2, v0)), nir_imm_vec4(b, 0.0, 0.0, -1.0, 0.0)); if (ccw) - return nir_fge(b, nir_imm_float(b, 0.0f), dir); + return nir_fle_imm(b, dir, 0.0f); else - return nir_flt(b, nir_imm_float(b, 0.0f), dir); + return nir_fgt_imm(b, dir, 0.0f); } static void diff --git a/src/gallium/drivers/r600/sfn/sfn_nir_lower_64bit.cpp b/src/gallium/drivers/r600/sfn/sfn_nir_lower_64bit.cpp index e48bfc5d12c..81f4e128f49 100644 --- a/src/gallium/drivers/r600/sfn/sfn_nir_lower_64bit.cpp +++ b/src/gallium/drivers/r600/sfn/sfn_nir_lower_64bit.cpp @@ -201,7 +201,7 @@ class LowerSplit64op : public NirLowerInstruction { } case nir_op_f2i32: { auto src = nir_ssa_for_alu_src(b, alu, 0); - auto gt0 = nir_flt(b, nir_imm_double(b, 0.0), src); + auto gt0 = nir_fgt_imm(b, src, 0.0); auto abs_src = nir_fabs(b, src); auto value = nir_f2u32(b, abs_src); return nir_bcsel(b, gt0, value, nir_ineg(b, value)); @@ -213,7 +213,7 @@ class LowerSplit64op : public NirLowerInstruction { * For values > UINT_MAX the result is undefined */ auto src = nir_ssa_for_alu_src(b, alu, 0); src = nir_fadd(b, src, nir_fneg(b, nir_ffract(b, src))); - auto gt0 = nir_flt(b, nir_imm_double(b, 0.0), src); + auto gt0 = nir_fgt_imm(b, src, 0.0); auto highval = nir_fmul_imm(b, src, 1.0 / 65536.0); auto fract = nir_ffract(b, highval); auto high = nir_f2u32(b, nir_f2f32(b, nir_fadd(b, highval, nir_fneg(b, fract)))); diff --git a/src/gallium/drivers/radeonsi/si_nir_lower_vs_inputs.c b/src/gallium/drivers/radeonsi/si_nir_lower_vs_inputs.c index 1a9db7e4371..f747ba69d97 100644 --- a/src/gallium/drivers/radeonsi/si_nir_lower_vs_inputs.c +++ b/src/gallium/drivers/radeonsi/si_nir_lower_vs_inputs.c @@ -116,7 +116,7 @@ load_vs_input_from_blit_sgpr(nir_builder *b, unsigned input_index, nir_ssa_def *out[4]) { nir_ssa_def *vertex_id = nir_load_vertex_id_zero_base(b); - nir_ssa_def *sel_x1 = nir_uge(b, nir_imm_int(b, 1), vertex_id); + nir_ssa_def *sel_x1 = nir_ule_imm(b, vertex_id, 1); /* Use nir_ine, because we have 3 vertices and only * the middle one should use y2. */ diff --git a/src/intel/compiler/brw_nir_lower_storage_image.c b/src/intel/compiler/brw_nir_lower_storage_image.c index fb55c091dae..74d67bd04f0 100644 --- a/src/intel/compiler/brw_nir_lower_storage_image.c +++ b/src/intel/compiler/brw_nir_lower_storage_image.c @@ -420,7 +420,7 @@ lower_image_load_instr(nir_builder *b, */ nir_ssa_def *stride = load_image_param(b, deref, STRIDE); nir_ssa_def *is_raw = - nir_ilt(b, nir_imm_int(b, 4), nir_channel(b, stride, 0)); + nir_igt_imm(b, nir_channel(b, stride, 0), 4); do_load = nir_iand(b, do_load, is_raw); } nir_push_if(b, do_load); @@ -571,7 +571,7 @@ lower_image_store_instr(nir_builder *b, */ nir_ssa_def *stride = load_image_param(b, deref, STRIDE); nir_ssa_def *is_raw = - nir_ilt(b, nir_imm_int(b, 4), nir_channel(b, stride, 0)); + nir_igt_imm(b, nir_channel(b, stride, 0), 4); do_store = nir_iand(b, do_store, is_raw); } nir_push_if(b, do_store); diff --git a/src/intel/compiler/brw_nir_tcs_workarounds.c b/src/intel/compiler/brw_nir_tcs_workarounds.c index 1cb8ed5ee7d..acdecdf9beb 100644 --- a/src/intel/compiler/brw_nir_tcs_workarounds.c +++ b/src/intel/compiler/brw_nir_tcs_workarounds.c @@ -89,12 +89,12 @@ emit_quads_workaround(nir_builder *b, nir_block *block) nir_ssa_def *outer = load_output(b, 4, 1, 0); nir_ssa_def *any_greater_than_1 = - nir_ior(b, nir_bany(b, nir_flt(b, nir_imm_float(b, 1.0f), outer)), - nir_bany(b, nir_flt(b, nir_imm_float(b, 1.0f), inner))); + nir_ior(b, nir_bany(b, nir_fgt_imm(b, outer, 1.0f)), + nir_bany(b, nir_fgt_imm(b, inner, 1.0f))); nir_push_if(b, any_greater_than_1); - inner = nir_bcsel(b, nir_fge(b, nir_imm_float(b, 1.0f), inner), + inner = nir_bcsel(b, nir_fle_imm(b, inner, 1.0f), nir_imm_float(b, 2.0f), inner); nir_store_output(b, inner, nir_imm_int(b, 0), diff --git a/src/intel/vulkan/anv_nir_lower_ubo_loads.c b/src/intel/vulkan/anv_nir_lower_ubo_loads.c index f1609a22c30..202f675f142 100644 --- a/src/intel/vulkan/anv_nir_lower_ubo_loads.c +++ b/src/intel/vulkan/anv_nir_lower_ubo_loads.c @@ -63,8 +63,7 @@ lower_ubo_load_instr(nir_builder *b, nir_instr *instr, UNUSED void *_data) for (unsigned i = 0; i < 2; i++) { nir_ssa_def *pred; if (bound) { - pred = nir_ilt(b, nir_imm_int(b, aligned_offset + i * 64 + 63), - bound); + pred = nir_igt_imm(b, bound, aligned_offset + i * 64 + 63); } else { pred = nir_imm_true(b); } diff --git a/src/intel/vulkan_hasvk/anv_nir_lower_ubo_loads.c b/src/intel/vulkan_hasvk/anv_nir_lower_ubo_loads.c index 5a170352c80..c9d0ef71d81 100644 --- a/src/intel/vulkan_hasvk/anv_nir_lower_ubo_loads.c +++ b/src/intel/vulkan_hasvk/anv_nir_lower_ubo_loads.c @@ -63,8 +63,7 @@ lower_ubo_load_instr(nir_builder *b, nir_instr *instr, UNUSED void *_data) for (unsigned i = 0; i < 2; i++) { nir_ssa_def *pred; if (bound) { - pred = nir_ilt(b, nir_imm_int(b, aligned_offset + i * 64 + 63), - bound); + pred = nir_igt_imm(b, bound, aligned_offset + i * 64 + 63); } else { pred = nir_imm_true(b); } diff --git a/src/mesa/program/prog_to_nir.c b/src/mesa/program/prog_to_nir.c index 7aed33de386..4b0a8d59ebc 100644 --- a/src/mesa/program/prog_to_nir.c +++ b/src/mesa/program/prog_to_nir.c @@ -366,7 +366,7 @@ ptn_lit(nir_builder *b, nir_alu_dest dest, nir_ssa_def **src) wclamp); nir_ssa_def *z = nir_bcsel(b, - nir_fge(b, nir_imm_float(b, 0.0), ptn_channel(b, src[0], X)), + nir_fle_imm(b, ptn_channel(b, src[0], X), 0.0), nir_imm_float(b, 0.0), pow); diff --git a/src/mesa/state_tracker/st_atifs_to_nir.c b/src/mesa/state_tracker/st_atifs_to_nir.c index 249d634ba13..8ade291fd4c 100644 --- a/src/mesa/state_tracker/st_atifs_to_nir.c +++ b/src/mesa/state_tracker/st_atifs_to_nir.c @@ -241,7 +241,7 @@ emit_arith_inst(struct st_translate *t, case GL_CND_ATI: return nir_bcsel(t->b, - nir_fge(t->b, nir_imm_vec4_float(t->b, 0.5), src[2]), + nir_fle_imm(t->b, src[2], 0.5), src[1], src[0]); diff --git a/src/mesa/state_tracker/st_draw_hw_select.c b/src/mesa/state_tracker/st_draw_hw_select.c index 54d56fb30fc..b58a0ba965d 100644 --- a/src/mesa/state_tracker/st_draw_hw_select.c +++ b/src/mesa/state_tracker/st_draw_hw_select.c @@ -274,7 +274,7 @@ clip_with_plane(nir_builder *b, nir_variable *vert, nir_variable *num_vert, nir_iadd_imm(b, num, -1), nir_iadd_imm(b, idx, -1)); nir_ssa_def *dp = nir_load_array_var(b, dist, prev); - nir_if *prev_if = nir_push_if(b, nir_flt(b, nir_imm_float(b, 0), dp)); + nir_if *prev_if = nir_push_if(b, nir_fgt_imm(b, dp, 0)); { /* +- case, replace - with inserted vertex * assert(vert_index <= idx), array is sure to not grow here @@ -296,7 +296,7 @@ clip_with_plane(nir_builder *b, nir_variable *vert, nir_variable *num_vert, nir_ssa_def *next = nir_bcsel(b, nir_ieq(b, idx, nir_iadd_imm(b, num, -1)), nir_imm_int(b, 0), nir_iadd_imm(b, idx, 1)); nir_ssa_def *dn = nir_load_array_var(b, dist, next); - nir_if *next_if = nir_push_if(b, nir_flt(b, nir_imm_float(b, 0), dn)); + nir_if *next_if = nir_push_if(b, nir_fgt_imm(b, dn, 0)); { /* -+ case, may grow array: * vert_index > idx: +-+ case, grow array, current vertex in 'saved', diff --git a/src/microsoft/compiler/dxil_nir.c b/src/microsoft/compiler/dxil_nir.c index 938848406a6..41440dd6093 100644 --- a/src/microsoft/compiler/dxil_nir.c +++ b/src/microsoft/compiler/dxil_nir.c @@ -1700,7 +1700,7 @@ lower_fquantize2f16(struct nir_builder *b, nir_instr *instr, void *data) nir_ssa_def *neg_inf_cond = nir_flt_imm(b, src, -65504.0f); nir_ssa_def *pos_inf_cond = - nir_flt(b, nir_imm_float(b, 65504.0f), src); + nir_fgt_imm(b, src, 65504.0f); nir_ssa_def *zero_cond = nir_flt_imm(b, nir_fabs(b, src), ldexpf(1.0, -14)); nir_ssa_def *zero = nir_iand_imm(b, src, 1 << 31); diff --git a/src/microsoft/vulkan/dzn_nir.c b/src/microsoft/vulkan/dzn_nir.c index 9fef765183f..7044acb45bd 100644 --- a/src/microsoft/vulkan/dzn_nir.c +++ b/src/microsoft/vulkan/dzn_nir.c @@ -790,9 +790,9 @@ cull_face(nir_builder *b, nir_variable *vertices, bool ccw) nir_fsub(b, v2, v0)), nir_imm_vec4(b, 0.0, 0.0, -1.0, 0.0)); if (ccw) - return nir_fge(b, nir_imm_float(b, 0.0f), dir); + return nir_fle_imm(b, dir, 0.0f); else - return nir_flt(b, nir_imm_float(b, 0.0f), dir); + return nir_fgt_imm(b, dir, 0.0f); } static void