intel/compiler: make default NIR compiler options visible
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26797>
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@@ -24,6 +24,7 @@
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#include "brw_compiler.h"
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#include "brw_shader.h"
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#include "brw_eu.h"
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#include "brw_nir.h"
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#include "dev/intel_debug.h"
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#include "compiler/nir/nir.h"
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#include "util/u_debug.h"
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@@ -76,12 +77,12 @@
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nir_divergence_single_patch_per_tes_subgroup | \
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nir_divergence_shader_record_ptr_uniform)
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static const struct nir_shader_compiler_options scalar_nir_options = {
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const struct nir_shader_compiler_options brw_scalar_nir_options = {
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COMMON_OPTIONS,
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COMMON_SCALAR_OPTIONS,
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};
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static const struct nir_shader_compiler_options vector_nir_options = {
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const struct nir_shader_compiler_options brw_vector_nir_options = {
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COMMON_OPTIONS,
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/* In the vec4 backend, our dpN instruction replicates its result to all the
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@@ -175,10 +176,10 @@ brw_compiler_create(void *mem_ctx, const struct intel_device_info *devinfo)
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rzalloc(compiler, struct nir_shader_compiler_options);
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bool is_scalar = compiler->scalar_stage[i];
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if (is_scalar) {
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*nir_options = scalar_nir_options;
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*nir_options = brw_scalar_nir_options;
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int64_options |= nir_lower_usub_sat64;
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} else {
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*nir_options = vector_nir_options;
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*nir_options = brw_vector_nir_options;
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}
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/* Prior to Gfx6, there are no three source operations, and Gfx11 loses
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@@ -33,6 +33,9 @@
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extern "C" {
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#endif
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extern const struct nir_shader_compiler_options brw_scalar_nir_options;
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extern const struct nir_shader_compiler_options brw_vector_nir_options;
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int type_size_vec4(const struct glsl_type *type, bool bindless);
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int type_size_dvec4(const struct glsl_type *type, bool bindless);
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