diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 3993cf4e945..f938a166d7e 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1408,6 +1408,8 @@ radv_emit_ps_epilog(struct radv_cmd_buffer *cmd_buffer)
     */
    assert(G_00B848_VGPRS(ps_shader->config.rsrc1) >= G_00B848_VGPRS(ps_epilog->rsrc1));
 
+   radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, ps_epilog->bo);
+
    assert((ps_epilog->va >> 32) == cmd_buffer->device->physical_device->rad_info.address32_hi);
 
    struct radv_userdata_info *loc =
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index dd0fc93259d..0810ca126e3 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -3108,14 +3108,8 @@ non_uniform_access_callback(const nir_src *src, void *_)
 VkResult
 radv_upload_shaders(struct radv_device *device, struct radv_pipeline *pipeline)
 {
-   struct radv_shader_part *ps_epilog = NULL;
    uint32_t code_size = 0;
 
-   if (pipeline->type == RADV_PIPELINE_GRAPHICS) {
-      struct radv_graphics_pipeline *graphics_pipeline = radv_pipeline_to_graphics(pipeline);
-      ps_epilog = graphics_pipeline->ps_epilog;
-   }
-
    /* Compute the total code size. */
    for (int i = 0; i < MESA_VULKAN_SHADER_STAGES; i++) {
       struct radv_shader *shader = pipeline->shaders[i];
@@ -3129,10 +3123,6 @@ radv_upload_shaders(struct radv_device *device, struct radv_pipeline *pipeline)
       code_size += align(pipeline->gs_copy_shader->code_size, RADV_SHADER_ALLOC_ALIGNMENT);
    }
 
-   if (ps_epilog) {
-      code_size += align(ps_epilog->code_size, RADV_SHADER_ALLOC_ALIGNMENT);
-   }
-
    /* Allocate memory for all shader binaries. */
    pipeline->slab = radv_pipeline_slab_create(device, pipeline, code_size);
    if (!pipeline->slab)
@@ -3166,15 +3156,6 @@ radv_upload_shaders(struct radv_device *device, struct radv_pipeline *pipeline)
       if (!radv_shader_binary_upload(device, pipeline->gs_copy_shader->binary,
                                      pipeline->gs_copy_shader, dest_ptr))
          return VK_ERROR_OUT_OF_HOST_MEMORY;
-
-      slab_offset += align(pipeline->gs_copy_shader->code_size, RADV_SHADER_ALLOC_ALIGNMENT);
-   }
-
-   if (ps_epilog) {
-      ps_epilog->va = slab_va + slab_offset;
-
-      void *dest_ptr = slab_ptr + slab_offset;
-      radv_shader_part_binary_upload(ps_epilog->binary, dest_ptr);
    }
 
    return VK_SUCCESS;
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 5a7e49ef6f4..a5423108cab 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -2516,17 +2516,35 @@ radv_create_ps_epilog(struct radv_device *device, const struct radv_ps_epilog_ke
                          (void **)&binary);
 
    epilog = radv_shader_part_create(binary, info.wave_size);
-   if (!epilog) {
-      free(binary);
-      return NULL;
-   }
+   if (!epilog)
+      goto fail_create;
+
+   /* Allocate memory and upload the epilog. */
+   epilog->alloc = radv_alloc_shader_memory(device, epilog->code_size, NULL);
+   if (!epilog->alloc)
+      goto fail_alloc;
+
+   epilog->bo = epilog->alloc->arena->bo;
+   epilog->va = radv_buffer_get_va(epilog->bo) + epilog->alloc->offset;
+
+   void *dest_ptr = epilog->alloc->arena->ptr + epilog->alloc->offset;
+   radv_shader_part_binary_upload(binary, dest_ptr);
 
    if (options.dump_shader) {
       fprintf(stderr, "Fragment epilog");
       fprintf(stderr, "\ndisasm:\n%s\n", epilog->disasm_string);
    }
 
+   free(epilog->binary);
+   epilog->binary = NULL;
+
    return epilog;
+
+fail_alloc:
+   radv_shader_part_destroy(device, epilog);
+fail_create:
+   free(binary);
+   return NULL;
 }
 
 void