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intel: Rename GEN_VERSIONx10 macro to GFX_VERx10

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Commands used to do the changes:
export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965"
grep -E "GEN_VERSION" -rIl $SEARCH_PATH | xargs sed -ie "s/GEN_VERSION/GFX_VER/g"

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9936>
This commit is contained in:
Anuj Phogat
2021-03-16 10:09:00 -07:00
committed by Marge Bot
parent b9b4324ca3
commit 295bb3c263
24 changed files with 192 additions and 192 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
src/intel/vulkan/genX_pipeline.c
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@@ -280,7 +280,7 @@ genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
entry_size, entries, start, deref_block_size,
&constrained);
#if GEN_VERSIONx10 == 70
#if GFX_VERx10 == 70
/* From the IVB PRM Vol. 2, Part 1, Section 3.2.1:
*
* "A PIPE_CONTROL with Post-Sync Operation set to 1h and a depth stall
@@ -611,7 +611,7 @@ emit_rs_state(struct anv_graphics_pipeline *pipeline,
sf.VertexSubPixelPrecisionSelect = _8Bit;
sf.AALineDistanceMode = true;
#if GEN_VERSIONx10 == 75
#if GFX_VERx10 == 75
sf.LineStippleEnable = line_info && line_info->stippledLineEnable;
#endif
@@ -2076,7 +2076,7 @@ emit_3dstate_ps(struct anv_graphics_pipeline *pipeline,
ps.DualSourceBlendEnable = dual_src_blend;
#endif
#if GEN_VERSIONx10 == 75
#if GFX_VERx10 == 75
/* Haswell requires the sample mask to be set in this packet as well
* as in 3DSTATE_SAMPLE_MASK; the values should match.
*/
@@ -2365,7 +2365,7 @@ genX(graphics_pipeline_create)(
return pipeline->base.batch.status;
}
#if GEN_VERSIONx10 >= 125
#if GFX_VERx10 >= 125
static void
emit_compute_state(struct anv_compute_pipeline *pipeline,
@@ -2390,7 +2390,7 @@ emit_compute_state(struct anv_compute_pipeline *pipeline,
}
}
#else /* #if GEN_VERSIONx10 >= 125 */
#else /* #if GFX_VERx10 >= 125 */
static void
emit_compute_state(struct anv_compute_pipeline *pipeline,
@@ -2438,7 +2438,7 @@ emit_compute_state(struct anv_compute_pipeline *pipeline,
*/
vfe.PerThreadScratchSpace =
ffs(cs_bin->prog_data->total_scratch) - 11;
} else if (GEN_VERSIONx10 == 75) {
} else if (GFX_VERx10 == 75) {
/* Haswell's Per Thread Scratch Space is in the range [0, 10]
* where 0 = 2k, 1 = 4k, 2 = 8k, ..., 10 = 2M.
*/
@@ -2471,11 +2471,11 @@ emit_compute_state(struct anv_compute_pipeline *pipeline,
.SharedLocalMemorySize =
encode_slm_size(GEN_GEN, cs_prog_data->base.total_shared),
#if GEN_VERSIONx10 != 75
#if GFX_VERx10 != 75
.ConstantURBEntryReadOffset = 0,
#endif
.ConstantURBEntryReadLength = cs_prog_data->push.per_thread.regs,
#if GEN_VERSIONx10 >= 75
#if GFX_VERx10 >= 75
.CrossThreadConstantDataReadLength =
cs_prog_data->push.cross_thread.regs,
#endif
@@ -2499,7 +2499,7 @@ emit_compute_state(struct anv_compute_pipeline *pipeline,
&desc);
}
#endif /* #if GEN_VERSIONx10 >= 125 */
#endif /* #if GFX_VERx10 >= 125 */
static VkResult
compute_pipeline_create(