intel/compiler: Implement WaClearTDRRegBeforeEOTForNonPS.
The bspec describes: "WA: Clear tdr register before send EOT in all non-PS shader kernels mov(8) tdr0:ud 0x0:ud {NoMask}" Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
@@ -573,6 +573,19 @@ fs_generator::generate_urb_write(fs_inst *inst, struct brw_reg payload)
|
|||||||
{
|
{
|
||||||
brw_inst *insn;
|
brw_inst *insn;
|
||||||
|
|
||||||
|
/* WaClearTDRRegBeforeEOTForNonPS.
|
||||||
|
*
|
||||||
|
* WA: Clear tdr register before send EOT in all non-PS shader kernels
|
||||||
|
*
|
||||||
|
* mov(8) tdr0:ud 0x0:ud {NoMask}"
|
||||||
|
*/
|
||||||
|
if (inst->eot && p->devinfo->gen == 10) {
|
||||||
|
brw_push_insn_state(p);
|
||||||
|
brw_set_default_mask_control(p, BRW_MASK_DISABLE);
|
||||||
|
brw_MOV(p, brw_tdr_reg(), brw_imm_uw(0));
|
||||||
|
brw_pop_insn_state(p);
|
||||||
|
}
|
||||||
|
|
||||||
insn = brw_next_insn(p, BRW_OPCODE_SEND);
|
insn = brw_next_insn(p, BRW_OPCODE_SEND);
|
||||||
|
|
||||||
brw_set_dest(p, insn, brw_null_reg());
|
brw_set_dest(p, insn, brw_null_reg());
|
||||||
|
@@ -774,6 +774,12 @@ brw_address_reg(unsigned subnr)
|
|||||||
return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_ADDRESS, subnr);
|
return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_ADDRESS, subnr);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static inline struct brw_reg
|
||||||
|
brw_tdr_reg(void)
|
||||||
|
{
|
||||||
|
return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_TDR, 0);
|
||||||
|
}
|
||||||
|
|
||||||
/* If/else instructions break in align16 mode if writemask & swizzle
|
/* If/else instructions break in align16 mode if writemask & swizzle
|
||||||
* aren't xyzw. This goes against the convention for other scalar
|
* aren't xyzw. This goes against the convention for other scalar
|
||||||
* regs:
|
* regs:
|
||||||
|
Reference in New Issue
Block a user