radeonsi/gfx9: use correct TC flush flags when invalidating CB & DB
Now we can finally stop flushing L2 data. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
@@ -976,17 +976,31 @@ void si_emit_cache_flush(struct si_context *sctx)
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cb_db_event = V_028A90_CACHE_FLUSH_AND_INV_TS_EVENT;
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}
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/* TC | TC_WB = invalidate L2 data
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* TC_MD | TC_WB = invalidate L2 metadata (DCC, etc.)
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* TC | TC_WB | TC_MD = invalidate L2 data & metadata
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/* These are the only allowed combinations. If you need to
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* do multiple operations at once, do them separately.
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* All operations that invalidate L2 also seem to invalidate
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* metadata. Volatile (VOL) and WC flushes are not listed here.
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*
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* TC | TC_WB = writeback & invalidate L2 & L1
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* TC | TC_WB | TC_NC = writeback & invalidate L2 for MTYPE == NC
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* TC_WB | TC_NC = writeback L2 for MTYPE == NC
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* TC | TC_NC = invalidate L2 for MTYPE == NC
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* TC | TC_MD = writeback & invalidate L2 metadata (DCC, etc.)
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* TCL1 = invalidate L1
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*/
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tc_flags = 0;
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/* When flushing CB or DB, L2 metadata should always be invali-
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* dated before texturing. Invalidating L2 data is not needed
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* in some cases.
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*/
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tc_flags = EVENT_TC_ACTION_ENA |
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EVENT_TC_MD_ACTION_ENA;
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/* Ideally flush TC together with CB/DB. */
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if (rctx->flags & SI_CONTEXT_INV_GLOBAL_L2) {
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tc_flags |= EVENT_TC_ACTION_ENA |
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EVENT_TC_WB_ACTION_ENA |
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EVENT_TCL1_ACTION_ENA;
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/* Writeback and invalidate everything in L2 & L1. */
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tc_flags = EVENT_TC_ACTION_ENA |
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EVENT_TC_WB_ACTION_ENA;
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/* Clear the flags. */
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rctx->flags &= ~(SI_CONTEXT_INV_GLOBAL_L2 |
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