Initial pull of code from r6xx-r7xx-support branch
Not functional yet.
This commit is contained in:
365
src/mesa/drivers/dri/r600/r700_fragprog.c
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365
src/mesa/drivers/dri/r600/r700_fragprog.c
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/*
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* Copyright (C) 2008-2009 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
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* AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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/*
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* Authors:
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* Richard Li <RichardZ.Li@amd.com>, <richardradeon@gmail.com>
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* CooperYuan <cooper.yuan@amd.com>, <cooperyuan@gmail.com>
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*/
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#include <stdio.h>
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#include <stdarg.h>
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#include <stdlib.h>
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#include <string.h>
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#include <math.h>
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#include "main/imports.h"
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#include "shader/prog_parameter.h"
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#include "shader/prog_statevars.h"
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#include "r600_context.h"
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#include "r700_chip.h"
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#include "r700_fragprog.h"
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/* to be enabled */
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#if 0
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#include "r700_emit.h"
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#endif
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#include "r700_debug.h"
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//TODO : Validate FP input with VP output.
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void Map_Fragment_Program(r700_AssemblerBase *pAsm,
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struct gl_fragment_program *mesa_fp)
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{
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unsigned int unBit;
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unsigned int i;
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GLuint ui;
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pAsm->number_used_registers = 0;
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//Input mapping : mesa_fp->Base.InputsRead set the flag, set in
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//The flags parsed in parse_attrib_binding. FRAG_ATTRIB_COLx, FRAG_ATTRIB_TEXx, ...
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//MUST match order in Map_Vertex_Output
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unBit = 1 << FRAG_ATTRIB_COL0;
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if(mesa_fp->Base.InputsRead & unBit)
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{
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pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL0] = pAsm->number_used_registers++;
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}
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unBit = 1 << FRAG_ATTRIB_COL1;
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if(mesa_fp->Base.InputsRead & unBit)
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{
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pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL1] = pAsm->number_used_registers++;
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}
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for(i=0; i<8; i++)
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{
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unBit = 1 << (FRAG_ATTRIB_TEX0 + i);
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if(mesa_fp->Base.InputsRead & unBit)
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{
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pAsm->uiFP_AttributeMap[FRAG_ATTRIB_TEX0 + i] = pAsm->number_used_registers++;
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}
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}
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/* Map temporary registers (GPRs) */
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pAsm->starting_temp_register_number = pAsm->number_used_registers;
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if(mesa_fp->Base.NumNativeTemporaries >= mesa_fp->Base.NumTemporaries)
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{
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pAsm->number_used_registers += mesa_fp->Base.NumNativeTemporaries;
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}
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else
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{
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pAsm->number_used_registers += mesa_fp->Base.NumTemporaries;
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}
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/* Output mapping */
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pAsm->number_of_exports = 0;
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pAsm->number_of_colorandz_exports = 0; /* don't include stencil and mask out. */
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pAsm->starting_export_register_number = pAsm->number_used_registers;
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unBit = 1 << FRAG_RESULT_COLOR;
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if(mesa_fp->Base.OutputsWritten & unBit)
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{
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pAsm->uiFP_OutputMap[FRAG_RESULT_COLOR] = pAsm->number_used_registers++;
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pAsm->number_of_exports++;
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pAsm->number_of_colorandz_exports++;
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}
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unBit = 1 << FRAG_RESULT_DEPTH;
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if(mesa_fp->Base.OutputsWritten & unBit)
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{
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pAsm->depth_export_register_number = pAsm->number_used_registers;
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pAsm->uiFP_OutputMap[FRAG_RESULT_DEPTH] = pAsm->number_used_registers++;
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pAsm->number_of_exports++;
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pAsm->number_of_colorandz_exports++;
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}
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pAsm->pucOutMask = (unsigned char*) MALLOC(pAsm->number_of_exports);
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for(ui=0; ui<pAsm->number_of_exports; ui++)
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{
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pAsm->pucOutMask[ui] = 0x0;
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}
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pAsm->uFirstHelpReg = pAsm->number_used_registers;
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}
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GLboolean Find_Instruction_Dependencies_fp(struct r700_fragment_program *fp,
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struct gl_fragment_program *mesa_fp)
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{
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GLuint i, j;
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GLint * puiTEMPwrites;
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struct prog_instruction * pILInst;
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InstDeps *pInstDeps;
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struct prog_instruction * texcoord_DepInst;
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GLint nDepInstID;
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puiTEMPwrites = (GLint*) MALLOC(sizeof(GLuint)*mesa_fp->Base.NumTemporaries);
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for(i=0; i<mesa_fp->Base.NumTemporaries; i++)
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{
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puiTEMPwrites[i] = -1;
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}
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pInstDeps = (InstDeps*)MALLOC(sizeof(InstDeps)*mesa_fp->Base.NumInstructions);
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for(i=0; i<mesa_fp->Base.NumInstructions; i++)
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{
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pInstDeps[i].nDstDep = -1;
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pILInst = &(mesa_fp->Base.Instructions[i]);
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//Dst
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if(pILInst->DstReg.File == PROGRAM_TEMPORARY)
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{
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//Set lastwrite for the temp
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puiTEMPwrites[pILInst->DstReg.Index] = i;
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}
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//Src
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for(j=0; j<3; j++)
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{
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if(pILInst->SrcReg[j].File == PROGRAM_TEMPORARY)
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{
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//Set dep.
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pInstDeps[i].nSrcDeps[j] = puiTEMPwrites[pILInst->SrcReg[j].Index];
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}
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else
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{
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pInstDeps[i].nSrcDeps[j] = -1;
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}
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}
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}
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fp->r700AsmCode.pInstDeps = pInstDeps;
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FREE(puiTEMPwrites);
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//Find dep for tex inst
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for(i=0; i<mesa_fp->Base.NumInstructions; i++)
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{
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pILInst = &(mesa_fp->Base.Instructions[i]);
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if(GL_TRUE == IsTex(pILInst->Opcode))
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{ //src0 is the tex coord register, src1 is texunit, src2 is textype
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nDepInstID = pInstDeps[i].nSrcDeps[0];
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if(nDepInstID >= 0)
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{
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texcoord_DepInst = &(mesa_fp->Base.Instructions[nDepInstID]);
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if(GL_TRUE == IsAlu(texcoord_DepInst->Opcode) )
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{
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pInstDeps[nDepInstID].nDstDep = i;
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pInstDeps[i].nDstDep = i;
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}
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else if(GL_TRUE == IsTex(texcoord_DepInst->Opcode) )
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{
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pInstDeps[i].nDstDep = i;
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}
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else
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{ //... other deps?
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}
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}
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}
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}
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return GL_TRUE;
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}
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GLboolean r700TranslateFragmentShader(struct r700_fragment_program *fp,
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struct gl_fragment_program *mesa_fp)
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{
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GLuint number_of_colors_exported;
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GLboolean z_enabled = GL_FALSE;
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GLuint unBit;
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//Init_Program
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Init_r700_AssemblerBase( SPT_FP, &(fp->r700AsmCode), &(fp->r700Shader) );
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Map_Fragment_Program(&(fp->r700AsmCode), mesa_fp);
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if( GL_FALSE == Find_Instruction_Dependencies_fp(fp, mesa_fp) )
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{
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return GL_FALSE;
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}
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if( GL_FALSE == AssembleInstr(mesa_fp->Base.NumInstructions,
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&(mesa_fp->Base.Instructions[0]),
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&(fp->r700AsmCode)) )
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{
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return GL_FALSE;
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}
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if(GL_FALSE == Process_Fragment_Exports(&(fp->r700AsmCode), mesa_fp->Base.OutputsWritten) )
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{
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return GL_FALSE;
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}
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fp->r700Shader.nRegs = (fp->r700AsmCode.number_used_registers == 0) ? 0
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: (fp->r700AsmCode.number_used_registers - 1);
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fp->r700Shader.nParamExports = fp->r700AsmCode.number_of_exports;
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number_of_colors_exported = fp->r700AsmCode.number_of_colorandz_exports;
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unBit = 1 << FRAG_RESULT_DEPTH;
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if(mesa_fp->Base.OutputsWritten & unBit)
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{
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z_enabled = GL_TRUE;
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number_of_colors_exported--;
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}
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fp->r700Shader.exportMode = number_of_colors_exported << 1 | z_enabled;
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fp->translated = GL_TRUE;
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return GL_TRUE;
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}
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GLboolean r700SetupFragmentProgram(GLcontext * ctx)
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{
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context_t *context = R700_CONTEXT(ctx);
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R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(context->chipobj.pvChipObj);
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struct r700_fragment_program *fp = (struct r700_fragment_program *)
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(ctx->FragmentProgram._Current);
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struct gl_program_parameter_list *paramList;
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unsigned int unNumParamData;
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unsigned int ui;
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unsigned int unNumOfReg;
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if(GL_FALSE == fp->loaded)
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{
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if(fp->r700Shader.bNeedsAssembly == GL_TRUE)
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{
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Assemble( &(fp->r700Shader) );
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}
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/* to be enabled */
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#if 0
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/* Load fp to gpu */
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(context->chipobj.EmitShader)(ctx,
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&(fp->shadercode),
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(GLvoid *)(fp->r700Shader.pProgram),
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fp->r700Shader.uShaderBinaryDWORDSize);
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#endif
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fp->loaded = GL_TRUE;
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}
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DumpHwBinary(DUMP_PIXEL_SHADER, (GLvoid *)(fp->r700Shader.pProgram),
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fp->r700Shader.uShaderBinaryDWORDSize);
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/* TODO : enable this after MemUse fixed *=
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(context->chipobj.MemUse)(context, fp->shadercode.buf->id);
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*/
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/* to be enabled */
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#if 0
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r700->SQ_PGM_START_PS.u32All = (fp->shadercode.aos_offset >> 8) & 0x00FFFFFF;
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#endif
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unNumOfReg = fp->r700Shader.nRegs + 1;
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ui = (r700->SPI_PS_IN_CONTROL_0.u32All & NUM_INTERP_mask) / (1 << NUM_INTERP_shift);
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ui = ui ? unNumOfReg : ui;
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SETfield(r700->SQ_PGM_RESOURCES_PS.u32All, ui, NUM_GPRS_shift, NUM_GPRS_mask);
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CLEARbit(r700->SQ_PGM_RESOURCES_PS.u32All, UNCACHED_FIRST_INST_bit);
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if(fp->r700Shader.uStackSize) /* we don't use branch for now, it should be zero. */
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{
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SETfield(r700->SQ_PGM_RESOURCES_PS.u32All, fp->r700Shader.uStackSize,
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STACK_SIZE_shift, STACK_SIZE_mask);
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}
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SETfield(r700->SQ_PGM_EXPORTS_PS.u32All, fp->r700Shader.exportMode,
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EXPORT_MODE_shift, EXPORT_MODE_mask);
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if(fp->r700Shader.killIsUsed)
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{
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SETbit(r700->DB_SHADER_CONTROL.u32All, KILL_ENABLE_bit);
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}
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else
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{
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CLEARbit(r700->DB_SHADER_CONTROL.u32All, KILL_ENABLE_bit);
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}
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if(fp->r700Shader.depthIsExported)
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{
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SETbit(r700->DB_SHADER_CONTROL.u32All, Z_EXPORT_ENABLE_bit);
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}
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else
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{
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CLEARbit(r700->DB_SHADER_CONTROL.u32All, Z_EXPORT_ENABLE_bit);
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}
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/* sent out shader constants. */
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paramList = fp->mesa_program.Base.Parameters;
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if(NULL != paramList)
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{
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_mesa_load_state_parameters(ctx, paramList);
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/* to be enabled */
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#if 0
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unNumParamData = paramList->NumParameters * 4;
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R700_CMDBUF_CHECK_SPACE(2 + unNumParamData);
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R700EP3(context, IT_SET_ALU_CONST, unNumParamData);
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/* assembler map const from very beginning. */
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R700E32(context, SQ_ALU_CONSTANT_PS_OFFSET * 4);
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unNumParamData = paramList->NumParameters;
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for(ui=0; ui<unNumParamData; ui++)
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{
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R700E32(context, *((unsigned int*)&(paramList->ParameterValues[ui][0])));
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R700E32(context, *((unsigned int*)&(paramList->ParameterValues[ui][1])));
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R700E32(context, *((unsigned int*)&(paramList->ParameterValues[ui][2])));
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R700E32(context, *((unsigned int*)&(paramList->ParameterValues[ui][3])));
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}
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#endif
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}
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return GL_TRUE;
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}
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Reference in New Issue
Block a user