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zink: PIPE_SHADER_TYPES -> MESA_SHADER_STAGES

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Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18051>
This commit is contained in:
Mike Blumenkrantz
2022-08-04 12:20:10 -04:00
parent fc657f8c07
commit 2792d2bd4a
4 changed files with 49 additions and 49 deletions
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30
src/gallium/drivers/zink/zink_context.c
View File

@@ -3925,8 +3925,8 @@ rebind_buffer(struct zink_context *ctx, struct zink_resource *res, uint32_t rebi
goto end;
const uint32_t ubo_mask = rebind_mask ?
rebind_mask & BITFIELD_RANGE(TC_BINDING_UBO_VS, PIPE_SHADER_TYPES) :
((res->ubo_bind_count[0] ? BITFIELD_RANGE(TC_BINDING_UBO_VS, (PIPE_SHADER_TYPES - 1)) : 0) |
rebind_mask & BITFIELD_RANGE(TC_BINDING_UBO_VS, MESA_SHADER_STAGES) :
((res->ubo_bind_count[0] ? BITFIELD_RANGE(TC_BINDING_UBO_VS, (MESA_SHADER_STAGES - 1)) : 0) |
(res->ubo_bind_count[1] ? BITFIELD_BIT(TC_BINDING_UBO_CS) : 0));
u_foreach_bit(shader, ubo_mask >> TC_BINDING_UBO_VS) {
u_foreach_bit(slot, res->ubo_bind_mask[shader]) {
@@ -3936,13 +3936,13 @@ rebind_buffer(struct zink_context *ctx, struct zink_resource *res, uint32_t rebi
num_rebinds++;
}
}
rebind_mask &= ~BITFIELD_RANGE(TC_BINDING_UBO_VS, PIPE_SHADER_TYPES);
rebind_mask &= ~BITFIELD_RANGE(TC_BINDING_UBO_VS, MESA_SHADER_STAGES);
if (num_rebinds && expected_num_rebinds >= num_rebinds && !rebind_mask)
goto end;
const unsigned ssbo_mask = rebind_mask ?
rebind_mask & BITFIELD_RANGE(TC_BINDING_SSBO_VS, PIPE_SHADER_TYPES) :
BITFIELD_RANGE(TC_BINDING_SSBO_VS, PIPE_SHADER_TYPES);
rebind_mask & BITFIELD_RANGE(TC_BINDING_SSBO_VS, MESA_SHADER_STAGES) :
BITFIELD_RANGE(TC_BINDING_SSBO_VS, MESA_SHADER_STAGES);
u_foreach_bit(shader, ssbo_mask >> TC_BINDING_SSBO_VS) {
u_foreach_bit(slot, res->ssbo_bind_mask[shader]) {
struct pipe_shader_buffer *ssbo = &ctx->ssbos[shader][slot];
@@ -3953,12 +3953,12 @@ rebind_buffer(struct zink_context *ctx, struct zink_resource *res, uint32_t rebi
num_rebinds++;
}
}
rebind_mask &= ~BITFIELD_RANGE(TC_BINDING_SSBO_VS, PIPE_SHADER_TYPES);
rebind_mask &= ~BITFIELD_RANGE(TC_BINDING_SSBO_VS, MESA_SHADER_STAGES);
if (num_rebinds && expected_num_rebinds >= num_rebinds && !rebind_mask)
goto end;
const unsigned sampler_mask = rebind_mask ?
rebind_mask & BITFIELD_RANGE(TC_BINDING_SAMPLERVIEW_VS, PIPE_SHADER_TYPES) :
BITFIELD_RANGE(TC_BINDING_SAMPLERVIEW_VS, PIPE_SHADER_TYPES);
rebind_mask & BITFIELD_RANGE(TC_BINDING_SAMPLERVIEW_VS, MESA_SHADER_STAGES) :
BITFIELD_RANGE(TC_BINDING_SAMPLERVIEW_VS, MESA_SHADER_STAGES);
u_foreach_bit(shader, sampler_mask >> TC_BINDING_SAMPLERVIEW_VS) {
u_foreach_bit(slot, res->sampler_binds[shader]) {
struct zink_sampler_view *sampler_view = zink_sampler_view(ctx->sampler_views[shader][slot]);
@@ -3968,13 +3968,13 @@ rebind_buffer(struct zink_context *ctx, struct zink_resource *res, uint32_t rebi
num_rebinds++;
}
}
rebind_mask &= ~BITFIELD_RANGE(TC_BINDING_SAMPLERVIEW_VS, PIPE_SHADER_TYPES);
rebind_mask &= ~BITFIELD_RANGE(TC_BINDING_SAMPLERVIEW_VS, MESA_SHADER_STAGES);
if (num_rebinds && expected_num_rebinds >= num_rebinds && !rebind_mask)
goto end;
const unsigned image_mask = rebind_mask ?
rebind_mask & BITFIELD_RANGE(TC_BINDING_IMAGE_VS, PIPE_SHADER_TYPES) :
BITFIELD_RANGE(TC_BINDING_IMAGE_VS, PIPE_SHADER_TYPES);
rebind_mask & BITFIELD_RANGE(TC_BINDING_IMAGE_VS, MESA_SHADER_STAGES) :
BITFIELD_RANGE(TC_BINDING_IMAGE_VS, MESA_SHADER_STAGES);
unsigned num_image_rebinds_remaining = rebind_mask ? expected_num_rebinds - num_rebinds : res->image_bind_count[0] + res->image_bind_count[1];
u_foreach_bit(shader, image_mask >> TC_BINDING_IMAGE_VS) {
for (unsigned slot = 0; num_image_rebinds_remaining && slot < ctx->di.num_images[shader]; slot++) {
@@ -4261,7 +4261,7 @@ rebind_image(struct zink_context *ctx, struct zink_resource *res)
zink_rebind_framebuffer(ctx, res);
if (!zink_resource_has_binds(res))
return;
for (unsigned i = 0; i < PIPE_SHADER_TYPES; i++) {
for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
if (res->sampler_binds[i]) {
for (unsigned j = 0; j < ctx->di.num_sampler_views[i]; j++) {
struct zink_sampler_view *sv = zink_sampler_view(ctx->sampler_views[i][j]);
@@ -4307,7 +4307,7 @@ zink_rebind_all_buffers(struct zink_context *ctx)
if (ctx->num_so_targets)
zink_resource_buffer_barrier(ctx, zink_resource(ctx->dummy_xfb_buffer),
VK_ACCESS_TRANSFORM_FEEDBACK_WRITE_BIT_EXT, VK_PIPELINE_STAGE_TRANSFORM_FEEDBACK_BIT_EXT);
for (unsigned shader = PIPE_SHADER_VERTEX; shader < PIPE_SHADER_TYPES; shader++) {
for (unsigned shader = PIPE_SHADER_VERTEX; shader < MESA_SHADER_STAGES; shader++) {
for (unsigned slot = 0; slot < ctx->di.num_ubos[shader]; slot++) {
struct zink_resource *res = rebind_ubo(ctx, shader, slot);
if (res)
@@ -4335,7 +4335,7 @@ void
zink_rebind_all_images(struct zink_context *ctx)
{
rebind_fb_state(ctx, NULL, false);
for (unsigned i = 0; i < PIPE_SHADER_TYPES; i++) {
for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
for (unsigned j = 0; j < ctx->di.num_sampler_views[i]; j++) {
struct zink_sampler_view *sv = zink_sampler_view(ctx->sampler_views[i][j]);
if (!sv)
@@ -4628,7 +4628,7 @@ zink_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags)
pipe_buffer_write_nooverlap(&ctx->base, ctx->dummy_vertex_buffer, 0, sizeof(data), data);
pipe_buffer_write_nooverlap(&ctx->base, ctx->dummy_xfb_buffer, 0, sizeof(data), data);
for (unsigned i = 0; i < PIPE_SHADER_TYPES; i++) {
for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
/* need to update these based on screen config for null descriptors */
for (unsigned j = 0; j < 32; j++) {
update_descriptor_state_ubo(ctx, i, j, NULL);

6
src/gallium/drivers/zink/zink_descriptors.c
View File

@@ -227,7 +227,7 @@ static struct zink_descriptor_layout *
create_gfx_layout(struct zink_context *ctx, struct zink_descriptor_layout_key **layout_key, bool fbfetch)
{
struct zink_screen *screen = zink_screen(ctx->base.screen);
VkDescriptorSetLayoutBinding bindings[PIPE_SHADER_TYPES];
VkDescriptorSetLayoutBinding bindings[MESA_SHADER_STAGES];
enum zink_descriptor_type dsl_type;
VkDescriptorType vktype = get_push_types(screen, &dsl_type);
for (unsigned i = 0; i < ZINK_GFX_SHADER_COUNT; i++)
@@ -386,8 +386,8 @@ bool
zink_descriptor_program_init(struct zink_context *ctx, struct zink_program *pg)
{
struct zink_screen *screen = zink_screen(ctx->base.screen);
VkDescriptorSetLayoutBinding bindings[ZINK_DESCRIPTOR_TYPES][PIPE_SHADER_TYPES * 64];
VkDescriptorUpdateTemplateEntry entries[ZINK_DESCRIPTOR_TYPES][PIPE_SHADER_TYPES * 64];
VkDescriptorSetLayoutBinding bindings[ZINK_DESCRIPTOR_TYPES][MESA_SHADER_STAGES * 64];
VkDescriptorUpdateTemplateEntry entries[ZINK_DESCRIPTOR_TYPES][MESA_SHADER_STAGES * 64];
unsigned num_bindings[ZINK_DESCRIPTOR_TYPES] = {0};
uint8_t has_bindings = 0;
unsigned push_count = 0;

6
src/gallium/drivers/zink/zink_program.c
View File

@@ -468,7 +468,7 @@ zink_pipeline_layout_create(struct zink_screen *screen, struct zink_program *pg,
static void
assign_io(struct zink_gfx_program *prog, struct zink_shader *stages[ZINK_GFX_SHADER_COUNT])
{
struct zink_shader *shaders[PIPE_SHADER_TYPES];
struct zink_shader *shaders[MESA_SHADER_STAGES];
/* build array in pipeline order */
for (unsigned i = 0; i < ZINK_GFX_SHADER_COUNT; i++)
@@ -1148,7 +1148,7 @@ bind_stage(struct zink_context *ctx, enum pipe_shader_type stage,
static void
bind_last_vertex_stage(struct zink_context *ctx)
{
enum pipe_shader_type old = ctx->last_vertex_stage ? pipe_shader_type_from_mesa(ctx->last_vertex_stage->nir->info.stage) : PIPE_SHADER_TYPES;
enum pipe_shader_type old = ctx->last_vertex_stage ? pipe_shader_type_from_mesa(ctx->last_vertex_stage->nir->info.stage) : MESA_SHADER_STAGES;
if (ctx->gfx_stages[PIPE_SHADER_GEOMETRY])
ctx->last_vertex_stage = ctx->gfx_stages[PIPE_SHADER_GEOMETRY];
else if (ctx->gfx_stages[PIPE_SHADER_TESS_EVAL])
@@ -1157,7 +1157,7 @@ bind_last_vertex_stage(struct zink_context *ctx)
ctx->last_vertex_stage = ctx->gfx_stages[PIPE_SHADER_VERTEX];
enum pipe_shader_type current = ctx->last_vertex_stage ? pipe_shader_type_from_mesa(ctx->last_vertex_stage->nir->info.stage) : PIPE_SHADER_VERTEX;
if (old != current) {
if (old != PIPE_SHADER_TYPES) {
if (old != MESA_SHADER_STAGES) {
memset(&ctx->gfx_pipeline_state.shader_keys.key[old].key.vs_base, 0, sizeof(struct zink_vs_key_base));
ctx->dirty_shader_stages |= BITFIELD_BIT(old);
} else {

56
src/gallium/drivers/zink/zink_types.h
View File

@@ -322,7 +322,7 @@ struct zink_descriptor_data {
struct zink_program *pg[2]; //gfx, compute
VkDescriptorUpdateTemplateEntry push_entries[PIPE_SHADER_TYPES]; //gfx+fbfetch
VkDescriptorUpdateTemplateEntry push_entries[MESA_SHADER_STAGES]; //gfx+fbfetch
VkDescriptorUpdateTemplateEntry compute_push_entry;
};
@@ -627,7 +627,7 @@ struct zink_gfx_pipeline_state {
uint32_t _pad;
uint32_t gkey; //for pipeline library lookups
VkShaderModule modules[PIPE_SHADER_TYPES - 1];
VkShaderModule modules[MESA_SHADER_STAGES - 1];
bool modules_changed;
uint32_t vertex_hash;
@@ -928,8 +928,8 @@ struct zink_resource {
uint8_t vbo_bind_count;
uint8_t so_bind_count; //not counted in all_binds
bool so_valid;
uint32_t ubo_bind_mask[PIPE_SHADER_TYPES];
uint32_t ssbo_bind_mask[PIPE_SHADER_TYPES];
uint32_t ubo_bind_mask[MESA_SHADER_STAGES];
uint32_t ssbo_bind_mask[MESA_SHADER_STAGES];
};
struct {
VkSparseImageMemoryRequirements sparse;
@@ -942,8 +942,8 @@ struct zink_resource {
uint8_t fb_binds; //not counted in all_binds
};
};
uint32_t sampler_binds[PIPE_SHADER_TYPES];
uint32_t image_binds[PIPE_SHADER_TYPES];
uint32_t sampler_binds[MESA_SHADER_STAGES];
uint32_t image_binds[MESA_SHADER_STAGES];
uint16_t sampler_bind_count[2]; //gfx, compute
uint16_t image_bind_count[2]; //gfx, compute
uint16_t write_bind_count[2]; //gfx, compute
@@ -1324,10 +1324,10 @@ struct zink_context {
unsigned shader_has_inlinable_uniforms_mask;
unsigned inlinable_uniforms_valid_mask;
struct pipe_constant_buffer ubos[PIPE_SHADER_TYPES][PIPE_MAX_CONSTANT_BUFFERS];
struct pipe_shader_buffer ssbos[PIPE_SHADER_TYPES][PIPE_MAX_SHADER_BUFFERS];
uint32_t writable_ssbos[PIPE_SHADER_TYPES];
struct zink_image_view image_views[PIPE_SHADER_TYPES][ZINK_MAX_SHADER_IMAGES];
struct pipe_constant_buffer ubos[MESA_SHADER_STAGES][PIPE_MAX_CONSTANT_BUFFERS];
struct pipe_shader_buffer ssbos[MESA_SHADER_STAGES][PIPE_MAX_SHADER_BUFFERS];
uint32_t writable_ssbos[MESA_SHADER_STAGES];
struct zink_image_view image_views[MESA_SHADER_STAGES][ZINK_MAX_SHADER_IMAGES];
uint32_t transient_attachments;
struct pipe_framebuffer_state fb_state;
@@ -1393,8 +1393,8 @@ struct zink_context {
struct pipe_vertex_buffer vertex_buffers[PIPE_MAX_ATTRIBS];
bool vertex_buffers_dirty;
struct zink_sampler_state *sampler_states[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
struct pipe_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
struct zink_sampler_state *sampler_states[MESA_SHADER_STAGES][PIPE_MAX_SAMPLERS];
struct pipe_sampler_view *sampler_views[MESA_SHADER_STAGES][PIPE_MAX_SAMPLERS];
struct zink_viewport_state vp_state;
bool vp_state_changed;
@@ -1441,29 +1441,29 @@ struct zink_context {
struct {
/* descriptor info */
VkDescriptorBufferInfo ubos[PIPE_SHADER_TYPES][PIPE_MAX_CONSTANT_BUFFERS];
VkDescriptorBufferInfo ubos[MESA_SHADER_STAGES][PIPE_MAX_CONSTANT_BUFFERS];
uint32_t push_valid;
uint8_t num_ubos[PIPE_SHADER_TYPES];
uint8_t num_ubos[MESA_SHADER_STAGES];
VkDescriptorBufferInfo ssbos[PIPE_SHADER_TYPES][PIPE_MAX_SHADER_BUFFERS];
uint8_t num_ssbos[PIPE_SHADER_TYPES];
VkDescriptorBufferInfo ssbos[MESA_SHADER_STAGES][PIPE_MAX_SHADER_BUFFERS];
uint8_t num_ssbos[MESA_SHADER_STAGES];
VkDescriptorImageInfo textures[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
VkBufferView tbos[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
uint32_t emulate_nonseamless[PIPE_SHADER_TYPES];
uint32_t cubes[PIPE_SHADER_TYPES];
uint8_t num_samplers[PIPE_SHADER_TYPES];
uint8_t num_sampler_views[PIPE_SHADER_TYPES];
VkDescriptorImageInfo textures[MESA_SHADER_STAGES][PIPE_MAX_SAMPLERS];
VkBufferView tbos[MESA_SHADER_STAGES][PIPE_MAX_SAMPLERS];
uint32_t emulate_nonseamless[MESA_SHADER_STAGES];
uint32_t cubes[MESA_SHADER_STAGES];
uint8_t num_samplers[MESA_SHADER_STAGES];
uint8_t num_sampler_views[MESA_SHADER_STAGES];
VkDescriptorImageInfo images[PIPE_SHADER_TYPES][ZINK_MAX_SHADER_IMAGES];
VkBufferView texel_images[PIPE_SHADER_TYPES][ZINK_MAX_SHADER_IMAGES];
uint8_t num_images[PIPE_SHADER_TYPES];
VkDescriptorImageInfo images[MESA_SHADER_STAGES][ZINK_MAX_SHADER_IMAGES];
VkBufferView texel_images[MESA_SHADER_STAGES][ZINK_MAX_SHADER_IMAGES];
uint8_t num_images[MESA_SHADER_STAGES];
VkDescriptorImageInfo fbfetch;
struct zink_resource *descriptor_res[ZINK_DESCRIPTOR_TYPES][PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
struct zink_descriptor_surface sampler_surfaces[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
struct zink_descriptor_surface image_surfaces[PIPE_SHADER_TYPES][ZINK_MAX_SHADER_IMAGES];
struct zink_resource *descriptor_res[ZINK_DESCRIPTOR_TYPES][MESA_SHADER_STAGES][PIPE_MAX_SAMPLERS];
struct zink_descriptor_surface sampler_surfaces[MESA_SHADER_STAGES][PIPE_MAX_SAMPLERS];
struct zink_descriptor_surface image_surfaces[MESA_SHADER_STAGES][ZINK_MAX_SHADER_IMAGES];
struct {
struct util_idalloc tex_slots;