vk: Move vkCmdPipelineBarrier to gen8_cmd_buffer.c
Signed-off-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
This commit is contained in:
Kristian Høgsberg Kristensen
@@ -638,144 +638,6 @@ void anv_CmdWaitEvents(
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stub();
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stub();
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}
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}
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void anv_CmdPipelineBarrier(
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VkCmdBuffer cmdBuffer,
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VkPipelineStageFlags srcStageMask,
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VkPipelineStageFlags destStageMask,
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VkBool32 byRegion,
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uint32_t memBarrierCount,
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const void* const* ppMemBarriers)
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{
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ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, cmdBuffer);
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uint32_t b, *dw;
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struct GEN8_PIPE_CONTROL cmd = {
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GEN8_PIPE_CONTROL_header,
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.PostSyncOperation = NoWrite,
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};
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/* XXX: I think waitEvent is a no-op on our HW. We should verify that. */
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if (anv_clear_mask(&srcStageMask, VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT)) {
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/* This is just what PIPE_CONTROL does */
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}
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if (anv_clear_mask(&srcStageMask,
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VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT |
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VK_PIPELINE_STAGE_VERTEX_INPUT_BIT |
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VK_PIPELINE_STAGE_VERTEX_SHADER_BIT |
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VK_PIPELINE_STAGE_TESS_CONTROL_SHADER_BIT |
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VK_PIPELINE_STAGE_TESS_EVALUATION_SHADER_BIT |
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VK_PIPELINE_STAGE_GEOMETRY_SHADER_BIT |
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VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT |
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VK_PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT |
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VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT |
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VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT)) {
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cmd.StallAtPixelScoreboard = true;
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}
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if (anv_clear_mask(&srcStageMask,
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VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT |
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VK_PIPELINE_STAGE_TRANSFER_BIT |
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VK_PIPELINE_STAGE_TRANSITION_BIT)) {
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cmd.CommandStreamerStallEnable = true;
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}
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if (anv_clear_mask(&srcStageMask, VK_PIPELINE_STAGE_HOST_BIT)) {
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anv_finishme("VK_PIPE_EVENT_CPU_SIGNAL_BIT");
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}
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/* On our hardware, all stages will wait for execution as needed. */
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(void)destStageMask;
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/* We checked all known VkPipeEventFlags. */
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anv_assert(srcStageMask == 0);
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/* XXX: Right now, we're really dumb and just flush whatever categories
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* the app asks for. One of these days we may make this a bit better
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* but right now that's all the hardware allows for in most areas.
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*/
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VkMemoryOutputFlags out_flags = 0;
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VkMemoryInputFlags in_flags = 0;
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for (uint32_t i = 0; i < memBarrierCount; i++) {
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const struct anv_common *common = ppMemBarriers[i];
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switch (common->sType) {
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case VK_STRUCTURE_TYPE_MEMORY_BARRIER: {
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ANV_COMMON_TO_STRUCT(VkMemoryBarrier, barrier, common);
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out_flags |= barrier->outputMask;
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in_flags |= barrier->inputMask;
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break;
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}
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case VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER: {
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ANV_COMMON_TO_STRUCT(VkBufferMemoryBarrier, barrier, common);
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out_flags |= barrier->outputMask;
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in_flags |= barrier->inputMask;
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break;
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}
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case VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER: {
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ANV_COMMON_TO_STRUCT(VkImageMemoryBarrier, barrier, common);
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out_flags |= barrier->outputMask;
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in_flags |= barrier->inputMask;
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break;
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}
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default:
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unreachable("Invalid memory barrier type");
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}
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}
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for_each_bit(b, out_flags) {
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switch ((VkMemoryOutputFlags)(1 << b)) {
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case VK_MEMORY_OUTPUT_HOST_WRITE_BIT:
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break; /* FIXME: Little-core systems */
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case VK_MEMORY_OUTPUT_SHADER_WRITE_BIT:
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cmd.DCFlushEnable = true;
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break;
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case VK_MEMORY_OUTPUT_COLOR_ATTACHMENT_BIT:
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cmd.RenderTargetCacheFlushEnable = true;
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break;
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case VK_MEMORY_OUTPUT_DEPTH_STENCIL_ATTACHMENT_BIT:
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cmd.DepthCacheFlushEnable = true;
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break;
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case VK_MEMORY_OUTPUT_TRANSFER_BIT:
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cmd.RenderTargetCacheFlushEnable = true;
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cmd.DepthCacheFlushEnable = true;
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break;
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default:
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unreachable("Invalid memory output flag");
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}
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}
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for_each_bit(b, out_flags) {
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switch ((VkMemoryInputFlags)(1 << b)) {
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case VK_MEMORY_INPUT_HOST_READ_BIT:
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break; /* FIXME: Little-core systems */
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case VK_MEMORY_INPUT_INDIRECT_COMMAND_BIT:
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case VK_MEMORY_INPUT_INDEX_FETCH_BIT:
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case VK_MEMORY_INPUT_VERTEX_ATTRIBUTE_FETCH_BIT:
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cmd.VFCacheInvalidationEnable = true;
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break;
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case VK_MEMORY_INPUT_UNIFORM_READ_BIT:
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cmd.ConstantCacheInvalidationEnable = true;
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/* fallthrough */
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case VK_MEMORY_INPUT_SHADER_READ_BIT:
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cmd.DCFlushEnable = true;
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cmd.TextureCacheInvalidationEnable = true;
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break;
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case VK_MEMORY_INPUT_COLOR_ATTACHMENT_BIT:
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case VK_MEMORY_INPUT_DEPTH_STENCIL_ATTACHMENT_BIT:
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break; /* XXX: Hunh? */
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case VK_MEMORY_INPUT_TRANSFER_BIT:
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cmd.TextureCacheInvalidationEnable = true;
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break;
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}
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}
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dw = anv_batch_emit_dwords(&cmd_buffer->batch, GEN8_PIPE_CONTROL_length);
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GEN8_PIPE_CONTROL_pack(&cmd_buffer->batch, dw, &cmd);
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}
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void anv_CmdPushConstants(
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void anv_CmdPushConstants(
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VkCmdBuffer cmdBuffer,
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VkCmdBuffer cmdBuffer,
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VkPipelineLayout layout,
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VkPipelineLayout layout,
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@@ -812,3 +812,141 @@ gen8_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer)
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anv_batch_emit(&cmd_buffer->batch, GEN8_PIPE_CONTROL,
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anv_batch_emit(&cmd_buffer->batch, GEN8_PIPE_CONTROL,
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.TextureCacheInvalidationEnable = true);
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.TextureCacheInvalidationEnable = true);
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}
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}
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void gen8_CmdPipelineBarrier(
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VkCmdBuffer cmdBuffer,
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VkPipelineStageFlags srcStageMask,
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VkPipelineStageFlags destStageMask,
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VkBool32 byRegion,
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uint32_t memBarrierCount,
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const void* const* ppMemBarriers)
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{
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ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, cmdBuffer);
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uint32_t b, *dw;
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struct GEN8_PIPE_CONTROL cmd = {
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GEN8_PIPE_CONTROL_header,
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.PostSyncOperation = NoWrite,
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};
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/* XXX: I think waitEvent is a no-op on our HW. We should verify that. */
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if (anv_clear_mask(&srcStageMask, VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT)) {
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/* This is just what PIPE_CONTROL does */
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}
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if (anv_clear_mask(&srcStageMask,
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VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT |
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VK_PIPELINE_STAGE_VERTEX_INPUT_BIT |
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VK_PIPELINE_STAGE_VERTEX_SHADER_BIT |
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VK_PIPELINE_STAGE_TESS_CONTROL_SHADER_BIT |
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VK_PIPELINE_STAGE_TESS_EVALUATION_SHADER_BIT |
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VK_PIPELINE_STAGE_GEOMETRY_SHADER_BIT |
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VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT |
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VK_PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT |
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VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT |
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VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT)) {
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cmd.StallAtPixelScoreboard = true;
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}
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if (anv_clear_mask(&srcStageMask,
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VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT |
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VK_PIPELINE_STAGE_TRANSFER_BIT |
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VK_PIPELINE_STAGE_TRANSITION_BIT)) {
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cmd.CommandStreamerStallEnable = true;
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}
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if (anv_clear_mask(&srcStageMask, VK_PIPELINE_STAGE_HOST_BIT)) {
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anv_finishme("VK_PIPE_EVENT_CPU_SIGNAL_BIT");
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}
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/* On our hardware, all stages will wait for execution as needed. */
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(void)destStageMask;
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/* We checked all known VkPipeEventFlags. */
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anv_assert(srcStageMask == 0);
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/* XXX: Right now, we're really dumb and just flush whatever categories
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* the app asks for. One of these days we may make this a bit better
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* but right now that's all the hardware allows for in most areas.
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*/
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VkMemoryOutputFlags out_flags = 0;
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VkMemoryInputFlags in_flags = 0;
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for (uint32_t i = 0; i < memBarrierCount; i++) {
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const struct anv_common *common = ppMemBarriers[i];
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switch (common->sType) {
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case VK_STRUCTURE_TYPE_MEMORY_BARRIER: {
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ANV_COMMON_TO_STRUCT(VkMemoryBarrier, barrier, common);
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out_flags |= barrier->outputMask;
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in_flags |= barrier->inputMask;
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break;
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}
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case VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER: {
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ANV_COMMON_TO_STRUCT(VkBufferMemoryBarrier, barrier, common);
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out_flags |= barrier->outputMask;
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in_flags |= barrier->inputMask;
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break;
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}
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case VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER: {
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ANV_COMMON_TO_STRUCT(VkImageMemoryBarrier, barrier, common);
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out_flags |= barrier->outputMask;
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in_flags |= barrier->inputMask;
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break;
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}
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default:
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unreachable("Invalid memory barrier type");
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}
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}
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for_each_bit(b, out_flags) {
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switch ((VkMemoryOutputFlags)(1 << b)) {
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case VK_MEMORY_OUTPUT_HOST_WRITE_BIT:
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break; /* FIXME: Little-core systems */
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case VK_MEMORY_OUTPUT_SHADER_WRITE_BIT:
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cmd.DCFlushEnable = true;
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break;
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case VK_MEMORY_OUTPUT_COLOR_ATTACHMENT_BIT:
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cmd.RenderTargetCacheFlushEnable = true;
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break;
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case VK_MEMORY_OUTPUT_DEPTH_STENCIL_ATTACHMENT_BIT:
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cmd.DepthCacheFlushEnable = true;
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break;
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case VK_MEMORY_OUTPUT_TRANSFER_BIT:
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cmd.RenderTargetCacheFlushEnable = true;
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cmd.DepthCacheFlushEnable = true;
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break;
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default:
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unreachable("Invalid memory output flag");
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}
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}
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for_each_bit(b, out_flags) {
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switch ((VkMemoryInputFlags)(1 << b)) {
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case VK_MEMORY_INPUT_HOST_READ_BIT:
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break; /* FIXME: Little-core systems */
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case VK_MEMORY_INPUT_INDIRECT_COMMAND_BIT:
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case VK_MEMORY_INPUT_INDEX_FETCH_BIT:
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case VK_MEMORY_INPUT_VERTEX_ATTRIBUTE_FETCH_BIT:
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cmd.VFCacheInvalidationEnable = true;
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break;
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case VK_MEMORY_INPUT_UNIFORM_READ_BIT:
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cmd.ConstantCacheInvalidationEnable = true;
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/* fallthrough */
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case VK_MEMORY_INPUT_SHADER_READ_BIT:
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cmd.DCFlushEnable = true;
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cmd.TextureCacheInvalidationEnable = true;
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break;
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case VK_MEMORY_INPUT_COLOR_ATTACHMENT_BIT:
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case VK_MEMORY_INPUT_DEPTH_STENCIL_ATTACHMENT_BIT:
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break; /* XXX: Hunh? */
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case VK_MEMORY_INPUT_TRANSFER_BIT:
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cmd.TextureCacheInvalidationEnable = true;
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break;
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}
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}
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dw = anv_batch_emit_dwords(&cmd_buffer->batch, GEN8_PIPE_CONTROL_length);
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GEN8_PIPE_CONTROL_pack(&cmd_buffer->batch, dw, &cmd);
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}
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Reference in New Issue
Block a user