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freedreno, ir3, tu: Constify various uses of ir3_shader_variant

Browse Source 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25076>
This commit is contained in:
Connor Abbott
2023-05-17 15:00:46 +02:00
committed by Marge Bot
parent d1b333a0b5
commit 252aee2634
19 changed files with 82 additions and 73 deletions
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2
src/freedreno/ir3/ir3_compiler.h
View File

@@ -258,7 +258,7 @@ void ir3_disk_cache_init_shader_key(struct ir3_compiler *compiler,
struct ir3_shader_variant *ir3_retrieve_variant(struct blob_reader *blob,
struct ir3_compiler *compiler,
void *mem_ctx);
void ir3_store_variant(struct blob *blob, struct ir3_shader_variant *v);
void ir3_store_variant(struct blob *blob, const struct ir3_shader_variant *v);
bool ir3_disk_cache_retrieve(struct ir3_shader *shader,
struct ir3_shader_variant *v);
void ir3_disk_cache_store(struct ir3_shader *shader,

4
src/freedreno/ir3/ir3_disk_cache.c
View File

@@ -143,7 +143,7 @@ retrieve_variant(struct blob_reader *blob, struct ir3_shader_variant *v)
}
static void
store_variant(struct blob *blob, struct ir3_shader_variant *v)
store_variant(struct blob *blob, const struct ir3_shader_variant *v)
{
blob_write_bytes(blob, VARIANT_CACHE_PTR(v), VARIANT_CACHE_SIZE);
@@ -199,7 +199,7 @@ ir3_retrieve_variant(struct blob_reader *blob, struct ir3_compiler *compiler,
}
void
ir3_store_variant(struct blob *blob, struct ir3_shader_variant *v)
ir3_store_variant(struct blob *blob, const struct ir3_shader_variant *v)
{
blob_write_bytes(blob, &v->key, sizeof(v->key));
blob_write_uint32(blob, v->type);

2
src/freedreno/ir3/ir3_shader.c
View File

@@ -578,7 +578,7 @@ trim_constlens(unsigned *constlens, unsigned first_stage, unsigned last_stage,
* order to satisfy all shared constlen limits.
*/
uint32_t
ir3_trim_constlen(struct ir3_shader_variant **variants,
ir3_trim_constlen(const struct ir3_shader_variant **variants,
const struct ir3_compiler *compiler)
{
unsigned constlens[MESA_SHADER_STAGES] = {};

2
src/freedreno/ir3/ir3_shader.h
View File

@@ -965,7 +965,7 @@ struct ir3_shader *
ir3_shader_from_nir(struct ir3_compiler *compiler, nir_shader *nir,
const struct ir3_shader_options *options,
struct ir3_stream_output_info *stream_output);
uint32_t ir3_trim_constlen(struct ir3_shader_variant **variants,
uint32_t ir3_trim_constlen(const struct ir3_shader_variant **variants,
const struct ir3_compiler *compiler);
struct ir3_shader *
ir3_shader_passthrough_tcs(struct ir3_shader *vs, unsigned patch_vertices);

37
src/freedreno/vulkan/tu_pipeline.cc
View File

@@ -252,8 +252,8 @@ struct tu_pipeline_builder
struct tu_compiled_shaders *compiled_shaders;
struct tu_const_state const_state[MESA_SHADER_FRAGMENT + 1];
struct ir3_shader_variant *variants[MESA_SHADER_FRAGMENT + 1];
struct ir3_shader_variant *binning_variant;
const struct ir3_shader_variant *variants[MESA_SHADER_FRAGMENT + 1];
const struct ir3_shader_variant *binning_variant;
uint64_t shader_iova[MESA_SHADER_FRAGMENT + 1];
uint64_t binning_vs_iova;
@@ -2214,7 +2214,7 @@ tu_pipeline_allocate_cs(struct tu_device *dev,
struct tu_pipeline *pipeline,
struct tu_pipeline_layout *layout,
struct tu_pipeline_builder *builder,
struct ir3_shader_variant *compute)
const struct ir3_shader_variant *compute)
{
uint32_t size = 1024;
@@ -2241,7 +2241,7 @@ tu_pipeline_allocate_cs(struct tu_device *dev,
builder->additional_cs_reserve_size = 0;
for (unsigned i = 0; i < ARRAY_SIZE(builder->variants); i++) {
struct ir3_shader_variant *variant = builder->variants[i];
const struct ir3_shader_variant *variant = builder->variants[i];
if (variant) {
builder->additional_cs_reserve_size +=
tu_xs_get_additional_cs_size_dwords(variant);
@@ -2393,7 +2393,8 @@ tu_upload_variant(struct tu_pipeline *pipeline,
}
static void
tu_append_executable(struct tu_pipeline *pipeline, struct ir3_shader_variant *variant,
tu_append_executable(struct tu_pipeline *pipeline,\
const struct ir3_shader_variant *variant,
char *nir_from_spirv)
{
struct tu_pipeline_executable exe = {
@@ -2598,10 +2599,10 @@ tu_shaders_destroy(struct vk_device *device,
container_of(object, struct tu_compiled_shaders, base);
for (unsigned i = 0; i < ARRAY_SIZE(shaders->variants); i++)
ralloc_free(shaders->variants[i]);
ralloc_free((void *)shaders->variants[i]);
for (unsigned i = 0; i < ARRAY_SIZE(shaders->safe_const_variants); i++)
ralloc_free(shaders->safe_const_variants[i]);
ralloc_free((void *)shaders->safe_const_variants[i]);
vk_pipeline_cache_object_finish(&shaders->base);
vk_free(&device->alloc, shaders);
@@ -2874,7 +2875,7 @@ tu_pipeline_builder_compile_shaders(struct tu_pipeline_builder *builder,
nir_shader *post_link_nir[ARRAY_SIZE(nir)] = { NULL };
struct tu_shader *shaders[ARRAY_SIZE(nir)] = { NULL };
char *nir_initial_disasm[ARRAY_SIZE(stage_infos)] = { NULL };
struct ir3_shader_variant *safe_const_variants[ARRAY_SIZE(nir)] = { NULL };
const struct ir3_shader_variant *safe_const_variants[ARRAY_SIZE(nir)] = { NULL };
struct tu_shader *last_shader = NULL;
uint32_t desc_sets = 0;
@@ -3132,7 +3133,7 @@ tu_pipeline_builder_compile_shaders(struct tu_pipeline_builder *builder,
if (safe_constlens & (1 << stage)) {
int64_t stage_start = os_time_get_nano();
ralloc_free(compiled_shaders->variants[stage]);
ralloc_free((void *)compiled_shaders->variants[stage]);
compiled_shaders->variants[stage] =
ir3_shader_create_variant(shaders[stage]->ir3_shader, &ir3_key,
executable_info);
@@ -3253,10 +3254,10 @@ done:;
}
if (pipeline_contains_all_shader_state(pipeline)) {
struct ir3_shader_variant *vs =
const struct ir3_shader_variant *vs =
builder->variants[MESA_SHADER_VERTEX];
struct ir3_shader_variant *variant;
const struct ir3_shader_variant *variant;
if (!vs->stream_output.num_outputs && ir3_has_binning_vs(&vs->key)) {
tu_append_executable(pipeline, vs->binning, NULL);
variant = vs->binning;
@@ -3448,7 +3449,7 @@ tu_pipeline_builder_parse_layout(struct tu_pipeline_builder *builder,
static void
tu_pipeline_set_linkage(struct tu_program_descriptor_linkage *link,
struct tu_const_state *const_state,
struct ir3_shader_variant *v)
const struct ir3_shader_variant *v)
{
link->const_state = *ir3_const_state(v);
link->tu_const_state = *const_state;
@@ -3494,10 +3495,10 @@ tu_pipeline_builder_parse_shader_stages(struct tu_pipeline_builder *builder,
builder->variants[i]);
}
struct ir3_shader_variant *vs = builder->variants[MESA_SHADER_VERTEX];
struct ir3_shader_variant *hs = builder->variants[MESA_SHADER_TESS_CTRL];
struct ir3_shader_variant *ds = builder->variants[MESA_SHADER_TESS_EVAL];
struct ir3_shader_variant *gs = builder->variants[MESA_SHADER_GEOMETRY];
const struct ir3_shader_variant *vs = builder->variants[MESA_SHADER_VERTEX];
const struct ir3_shader_variant *hs = builder->variants[MESA_SHADER_TESS_CTRL];
const struct ir3_shader_variant *ds = builder->variants[MESA_SHADER_TESS_EVAL];
const struct ir3_shader_variant *gs = builder->variants[MESA_SHADER_GEOMETRY];
if (hs) {
pipeline->program.vs_param_stride = vs->output_size;
pipeline->program.hs_param_stride = hs->output_size;
@@ -3549,7 +3550,7 @@ tu_pipeline_builder_parse_shader_stages(struct tu_pipeline_builder *builder,
}
}
struct ir3_shader_variant *last_shader;
const struct ir3_shader_variant *last_shader;
if (gs)
last_shader = gs;
else if (ds)
@@ -5476,7 +5477,7 @@ tu_compute_pipeline_create(VkDevice device,
TU_FROM_HANDLE(tu_pipeline_layout, layout, pCreateInfo->layout);
const VkPipelineShaderStageCreateInfo *stage_info = &pCreateInfo->stage;
VkResult result;
struct ir3_shader_variant *v = NULL;
const struct ir3_shader_variant *v = NULL;
uint32_t additional_reserve_size = 0;
uint64_t shader_iova = 0;

6
src/freedreno/vulkan/tu_pipeline.h
View File

@@ -65,9 +65,9 @@ struct tu_compiled_shaders
struct tu_const_state const_state[MESA_SHADER_STAGES];
uint8_t active_desc_sets;
struct ir3_shader_variant *variants[MESA_SHADER_STAGES];
const struct ir3_shader_variant *variants[MESA_SHADER_STAGES];
struct ir3_shader_variant *safe_const_variants[MESA_SHADER_STAGES];
const struct ir3_shader_variant *safe_const_variants[MESA_SHADER_STAGES];
};
struct tu_nir_shaders
@@ -218,7 +218,7 @@ struct tu_graphics_lib_pipeline {
nir_shader *nir;
struct tu_shader_key key;
struct tu_const_state const_state;
struct ir3_shader_variant *variant, *safe_const_variant;
const struct ir3_shader_variant *variant, *safe_const_variant;
} shaders[MESA_SHADER_FRAGMENT + 1];
struct ir3_shader_key ir3_key;

10
src/gallium/drivers/freedreno/a3xx/fd3_program.c
View File

@@ -450,10 +450,12 @@ fd3_program_emit(struct fd_ringbuffer *ring, struct fd3_emit *emit, int nr,
}
static struct ir3_program_state *
fd3_program_create(void *data, struct ir3_shader_variant *bs,
struct ir3_shader_variant *vs, struct ir3_shader_variant *hs,
struct ir3_shader_variant *ds, struct ir3_shader_variant *gs,
struct ir3_shader_variant *fs,
fd3_program_create(void *data, const struct ir3_shader_variant *bs,
const struct ir3_shader_variant *vs,
const struct ir3_shader_variant *hs,
const struct ir3_shader_variant *ds,
const struct ir3_shader_variant *gs,
const struct ir3_shader_variant *fs,
const struct ir3_cache_key *key) in_dt
{
struct fd_context *ctx = fd_context(data);

6
src/gallium/drivers/freedreno/a3xx/fd3_program.h
View File

@@ -37,9 +37,9 @@ struct fd3_emit;
struct fd3_program_state {
struct ir3_program_state base;
struct ir3_shader_variant *bs; /* VS for when emit->binning */
struct ir3_shader_variant *vs;
struct ir3_shader_variant *fs; /* FS for when !emit->binning */
const struct ir3_shader_variant *bs; /* VS for when emit->binning */
const struct ir3_shader_variant *vs;
const struct ir3_shader_variant *fs; /* FS for when !emit->binning */
};
static inline struct fd3_program_state *

10
src/gallium/drivers/freedreno/a4xx/fd4_program.c
View File

@@ -578,10 +578,12 @@ fd4_program_emit(struct fd_ringbuffer *ring, struct fd4_emit *emit, int nr,
}
static struct ir3_program_state *
fd4_program_create(void *data, struct ir3_shader_variant *bs,
struct ir3_shader_variant *vs, struct ir3_shader_variant *hs,
struct ir3_shader_variant *ds, struct ir3_shader_variant *gs,
struct ir3_shader_variant *fs,
fd4_program_create(void *data, const struct ir3_shader_variant *bs,
const struct ir3_shader_variant *vs,
const struct ir3_shader_variant *hs,
const struct ir3_shader_variant *ds,
const struct ir3_shader_variant *gs,
const struct ir3_shader_variant *fs,
const struct ir3_cache_key *key) in_dt
{
struct fd_context *ctx = fd_context(data);

6
src/gallium/drivers/freedreno/a4xx/fd4_program.h
View File

@@ -37,9 +37,9 @@ struct fd4_emit;
struct fd4_program_state {
struct ir3_program_state base;
struct ir3_shader_variant *bs; /* VS for when emit->binning */
struct ir3_shader_variant *vs;
struct ir3_shader_variant *fs; /* FS for when !emit->binning */
const struct ir3_shader_variant *bs; /* VS for when emit->binning */
const struct ir3_shader_variant *vs;
const struct ir3_shader_variant *fs; /* FS for when !emit->binning */
};
static inline struct fd4_program_state *

10
src/gallium/drivers/freedreno/a5xx/fd5_program.c
View File

@@ -748,10 +748,12 @@ fd5_program_emit(struct fd_context *ctx, struct fd_ringbuffer *ring,
}
static struct ir3_program_state *
fd5_program_create(void *data, struct ir3_shader_variant *bs,
struct ir3_shader_variant *vs, struct ir3_shader_variant *hs,
struct ir3_shader_variant *ds, struct ir3_shader_variant *gs,
struct ir3_shader_variant *fs,
fd5_program_create(void *data, const struct ir3_shader_variant *bs,
const struct ir3_shader_variant *vs,
const struct ir3_shader_variant *hs,
const struct ir3_shader_variant *ds,
const struct ir3_shader_variant *gs,
const struct ir3_shader_variant *fs,
const struct ir3_cache_key *key) in_dt
{
struct fd_context *ctx = fd_context(data);

6
src/gallium/drivers/freedreno/a5xx/fd5_program.h
View File

@@ -37,9 +37,9 @@ struct fd5_emit;
struct fd5_program_state {
struct ir3_program_state base;
struct ir3_shader_variant *bs; /* VS for when emit->binning */
struct ir3_shader_variant *vs;
struct ir3_shader_variant *fs; /* FS for when !emit->binning */
const struct ir3_shader_variant *bs; /* VS for when emit->binning */
const struct ir3_shader_variant *vs;
const struct ir3_shader_variant *fs; /* FS for when !emit->binning */
};
static inline struct fd5_program_state *

6
src/gallium/drivers/freedreno/a6xx/fd6_const.cc
View File

@@ -111,7 +111,7 @@ emit_const_ptrs(struct fd_ringbuffer *ring, const struct ir3_shader_variant *v,
}
static void
emit_stage_tess_consts(struct fd_ringbuffer *ring, struct ir3_shader_variant *v,
emit_stage_tess_consts(struct fd_ringbuffer *ring, const struct ir3_shader_variant *v,
uint32_t *params, int num_params)
{
const struct ir3_const_state *const_state = ir3_const_state(v);
@@ -166,7 +166,7 @@ fd6_build_tess_consts(struct fd6_emit *emit)
}
if (emit->gs) {
struct ir3_shader_variant *prev;
const struct ir3_shader_variant *prev;
if (emit->ds)
prev = emit->ds;
else
@@ -229,7 +229,7 @@ fd6_emit_ubos(const struct ir3_shader_variant *v, struct fd_ringbuffer *ring,
}
unsigned
fd6_user_consts_cmdstream_size(struct ir3_shader_variant *v)
fd6_user_consts_cmdstream_size(const struct ir3_shader_variant *v)
{
if (!v)
return 0;

2
src/gallium/drivers/freedreno/a6xx/fd6_const.h
View File

@@ -28,7 +28,7 @@
#include "fd6_emit.h"
struct fd_ringbuffer *fd6_build_tess_consts(struct fd6_emit *emit) assert_dt;
unsigned fd6_user_consts_cmdstream_size(struct ir3_shader_variant *v);
unsigned fd6_user_consts_cmdstream_size(const struct ir3_shader_variant *v);
template <fd6_pipeline_type PIPELINE>
struct fd_ringbuffer *fd6_build_user_consts(struct fd6_emit *emit) assert_dt;

10
src/gallium/drivers/freedreno/a6xx/fd6_emit.h
View File

@@ -200,11 +200,11 @@ struct fd6_emit {
/* cached to avoid repeated lookups: */
const struct fd6_program_state *prog;
struct ir3_shader_variant *vs;
struct ir3_shader_variant *hs;
struct ir3_shader_variant *ds;
struct ir3_shader_variant *gs;
struct ir3_shader_variant *fs;
const struct ir3_shader_variant *vs;
const struct ir3_shader_variant *hs;
const struct ir3_shader_variant *ds;
const struct ir3_shader_variant *gs;
const struct ir3_shader_variant *fs;
struct fd6_state state;
};

12
src/gallium/drivers/freedreno/a6xx/fd6_program.cc
View File

@@ -285,7 +285,7 @@ setup_stream_out(struct fd_context *ctx, struct fd6_program_state *state,
}
static uint32_t
sp_xs_config(struct ir3_shader_variant *v)
sp_xs_config(const struct ir3_shader_variant *v)
{
if (!v)
return 0;
@@ -1312,10 +1312,12 @@ emit_interp_state(struct fd_ringbuffer *ring, const struct fd6_program_state *st
template <chip CHIP>
static struct ir3_program_state *
fd6_program_create(void *data, struct ir3_shader_variant *bs,
struct ir3_shader_variant *vs, struct ir3_shader_variant *hs,
struct ir3_shader_variant *ds, struct ir3_shader_variant *gs,
struct ir3_shader_variant *fs,
fd6_program_create(void *data, const struct ir3_shader_variant *bs,
const struct ir3_shader_variant *vs,
const struct ir3_shader_variant *hs,
const struct ir3_shader_variant *ds,
const struct ir3_shader_variant *gs,
const struct ir3_shader_variant *fs,
const struct ir3_cache_key *key) in_dt
{
struct fd_context *ctx = fd_context((struct pipe_context *)data);

12
src/gallium/drivers/freedreno/a6xx/fd6_program.h
View File

@@ -38,12 +38,12 @@ struct fd6_emit;
struct fd6_program_state {
struct ir3_program_state base;
struct ir3_shader_variant *bs; /* binning pass vs */
struct ir3_shader_variant *vs;
struct ir3_shader_variant *hs;
struct ir3_shader_variant *ds;
struct ir3_shader_variant *gs;
struct ir3_shader_variant *fs;
const struct ir3_shader_variant *bs; /* binning pass vs */
const struct ir3_shader_variant *vs;
const struct ir3_shader_variant *hs;
const struct ir3_shader_variant *ds;
const struct ir3_shader_variant *gs;
const struct ir3_shader_variant *fs;
struct fd_ringbuffer *config_stateobj;
struct fd_ringbuffer *interp_stateobj;
struct fd_ringbuffer *binning_stateobj;

4
src/gallium/drivers/freedreno/ir3/ir3_cache.c
View File

@@ -117,7 +117,7 @@ ir3_cache_lookup(struct ir3_cache *cache, const struct ir3_cache_key *key,
shaders[MESA_SHADER_TESS_CTRL] = hs;
}
struct ir3_shader_variant *variants[MESA_SHADER_STAGES];
const struct ir3_shader_variant *variants[MESA_SHADER_STAGES];
struct ir3_shader_key shader_key = key->key;
for (gl_shader_stage stage = MESA_SHADER_VERTEX; stage < MESA_SHADER_STAGES;
@@ -146,7 +146,7 @@ ir3_cache_lookup(struct ir3_cache *cache, const struct ir3_cache_key *key,
}
}
struct ir3_shader_variant *bs;
const struct ir3_shader_variant *bs;
if (ir3_has_binning_vs(&key->key)) {
/* starting with a6xx, the same const state is used for binning and draw

8
src/gallium/drivers/freedreno/ir3/ir3_cache.h
View File

@@ -61,10 +61,10 @@ struct ir3_program_state {
struct ir3_cache_funcs {
struct ir3_program_state *(*create_state)(
void *data, struct ir3_shader_variant *bs, /* binning pass vs */
struct ir3_shader_variant *vs, struct ir3_shader_variant *hs,
struct ir3_shader_variant *ds, struct ir3_shader_variant *gs,
struct ir3_shader_variant *fs, const struct ir3_cache_key *key);
void *data, const struct ir3_shader_variant *bs, /* binning pass vs */
const struct ir3_shader_variant *vs, const struct ir3_shader_variant *hs,
const struct ir3_shader_variant *ds, const struct ir3_shader_variant *gs,
const struct ir3_shader_variant *fs, const struct ir3_cache_key *key);
void (*destroy_state)(void *data, struct ir3_program_state *state);
};