intel/vec4: Set brw_stage_prog_data::has_ubo_pull
In0e4a75f917
, Ken added a flag brw_stage_prog_data which indicates whether any UBO pulls ever occur. Unfortunately, he neglected to set the bit in the vec4 back-end. This was fine at the time because the optimization was intended for iris which does not support gen7 and using the vec4 back-end on Gen8+ requires an environment variable. We want to use this in Vulkan which does support Gen7 so we want the information from the vec4 back-end as well as scalar. Fixes:0e4a75f917
"intel/compiler: Record whether any pull constant..." Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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@@ -627,6 +627,8 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
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case nir_intrinsic_load_ubo: {
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case nir_intrinsic_load_ubo: {
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src_reg surf_index;
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src_reg surf_index;
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prog_data->base.has_ubo_pull = true;
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dest = get_nir_dest(instr->dest);
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dest = get_nir_dest(instr->dest);
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if (nir_src_is_const(instr->src[0])) {
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if (nir_src_is_const(instr->src[0])) {
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