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i965: Add plumbing for shader time in 32-wide FS dispatch mode.

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Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Francisco Jerez
2016-04-25 17:02:05 -07:00
committed by Jason Ekstrand
parent 2d7d652d5c
commit 244a0ff3a8
7 changed files with 15 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/intel/blorp/blorp.c
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@@ -217,7 +217,7 @@ blorp_compile_fs(struct blorp_context *blorp, void *mem_ctx,
const unsigned *program =
brw_compile_fs(compiler, blorp->driver_ctx, mem_ctx, wm_key,
wm_prog_data, nir, NULL, -1, -1, false, use_repclear,
wm_prog_data, nir, NULL, -1, -1, -1, false, use_repclear,
NULL, NULL);
return program;

1
src/intel/compiler/brw_compiler.h
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@@ -1312,6 +1312,7 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data,
struct gl_program *prog,
int shader_time_index8,
int shader_time_index16,
int shader_time_index32,
bool allow_spilling,
bool use_rep_send, struct brw_vue_map *vue_map,
char **error_str);

2
src/intel/compiler/brw_fs.cpp
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@@ -7108,7 +7108,7 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data,
const nir_shader *src_shader,
struct gl_program *prog,
int shader_time_index8, int shader_time_index16,
bool allow_spilling,
int shader_time_index32, bool allow_spilling,
bool use_rep_send, struct brw_vue_map *vue_map,
char **error_str)
{

2
src/intel/vulkan/anv_pipeline.c
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@@ -986,7 +986,7 @@ anv_pipeline_compile_fs(struct anv_pipeline *pipeline,
const unsigned *shader_code =
brw_compile_fs(compiler, NULL, mem_ctx, &key, &prog_data, nir,
NULL, -1, -1, true, false, NULL, NULL);
NULL, -1, -1, -1, true, false, NULL, NULL);
if (shader_code == NULL) {
ralloc_free(mem_ctx);
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);

1
src/mesa/drivers/dri/i965/brw_context.h
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@@ -426,6 +426,7 @@ enum shader_time_shader_type {
ST_GS,
ST_FS8,
ST_FS16,
ST_FS32,
ST_CS,
};

6
src/mesa/drivers/dri/i965/brw_program.c
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@@ -541,6 +541,7 @@ brw_report_shader_time(struct brw_context *brw)
case ST_GS:
case ST_FS8:
case ST_FS16:
case ST_FS32:
case ST_CS:
written = brw->shader_time.cumulative[i].written;
reset = brw->shader_time.cumulative[i].reset;
@@ -569,6 +570,7 @@ brw_report_shader_time(struct brw_context *brw)
case ST_GS:
case ST_FS8:
case ST_FS16:
case ST_FS32:
case ST_CS:
total_by_type[type] += scaled[i];
break;
@@ -618,6 +620,9 @@ brw_report_shader_time(struct brw_context *brw)
case ST_FS16:
stage = "fs16";
break;
case ST_FS32:
stage = "fs32";
break;
case ST_CS:
stage = "cs";
break;
@@ -637,6 +642,7 @@ brw_report_shader_time(struct brw_context *brw)
print_shader_time_line("total", "gs", 0, total_by_type[ST_GS], total);
print_shader_time_line("total", "fs8", 0, total_by_type[ST_FS8], total);
print_shader_time_line("total", "fs16", 0, total_by_type[ST_FS16], total);
print_shader_time_line("total", "fs32", 0, total_by_type[ST_FS32], total);
print_shader_time_line("total", "cs", 0, total_by_type[ST_CS], total);
}

6
src/mesa/drivers/dri/i965/brw_wm.c
View File

@@ -164,18 +164,20 @@ brw_codegen_wm_prog(struct brw_context *brw,
start_time = get_time();
}
int st_index8 = -1, st_index16 = -1;
int st_index8 = -1, st_index16 = -1, st_index32 = -1;
if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
st_index8 = brw_get_shader_time_index(brw, &fp->program, ST_FS8,
!fp->program.is_arb_asm);
st_index16 = brw_get_shader_time_index(brw, &fp->program, ST_FS16,
!fp->program.is_arb_asm);
st_index32 = brw_get_shader_time_index(brw, &fp->program, ST_FS32,
!fp->program.is_arb_asm);
}
char *error_str = NULL;
program = brw_compile_fs(brw->screen->compiler, brw, mem_ctx,
key, &prog_data, fp->program.nir,
&fp->program, st_index8, st_index16,
&fp->program, st_index8, st_index16, st_index32,
true, false, vue_map,
&error_str);