From 23e7d44a88dd86747fef331408fe4d8fc7e8da4c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Mon, 20 Feb 2023 00:22:48 -0500 Subject: [PATCH] radeonsi: always add 1 to lshs_vertex_stride now that LS_OUT_PATCH_SIZE is gone LS_OUT_PATCH_SIZE limited the maximum value. Acked-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/gallium/drivers/radeonsi/si_shader_info.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_shader_info.c b/src/gallium/drivers/radeonsi/si_shader_info.c index ddfbe856e79..9fc5b38a49c 100644 --- a/src/gallium/drivers/radeonsi/si_shader_info.c +++ b/src/gallium/drivers/radeonsi/si_shader_info.c @@ -784,11 +784,10 @@ void si_nir_scan_shader(struct si_screen *sscreen, const struct nir_shader *nir, /* Add 1 dword to reduce LDS bank conflicts, so that each vertex * will start on a different bank. (except for the maximum 32*16). */ - if (info->lshs_vertex_stride < 32 * 16) - info->lshs_vertex_stride += 4; + info->lshs_vertex_stride += 4; /* For the ESGS ring in LDS, add 1 dword to reduce LDS bank - * conflicts, i.e. each vertex will start at a different bank. + * conflicts, i.e. each vertex will start on a different bank. */ if (sscreen->info.gfx_level >= GFX9) info->esgs_itemsize += 4;