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freedreno: Allow UBWC on textures with multiple mipmap levels.

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This is a backport of Jonathan Marek's UBWC work on turnip to GL.

Performance highlights from our trace set (320 frames sampled)
traces/glmark2/texture-texture-filter=mipmap.rdc:    +9.1% +/-   2.2%
traces/android/trex.rdc:                             +8.7% +/-   0.4%
traces/glmark2/desktop-effect=shadow:windows=4.rdc:  +4.2% +/-   2.5%

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>
This commit is contained in:
Eric Anholt
2019-11-21 15:09:02 -08:00
committed by Marge Bot
parent ecd62ff766
commit 22d2cbe685
12 changed files with 51 additions and 98 deletions
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14
src/freedreno/fdl/fd6_layout.c
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@@ -69,7 +69,7 @@ void
fdl6_layout(struct fdl_layout *layout,
enum pipe_format format, uint32_t nr_samples,
uint32_t width0, uint32_t height0, uint32_t depth0,
uint32_t mip_levels, uint32_t array_size, bool is_3d, bool ubwc)
uint32_t mip_levels, uint32_t array_size, bool is_3d)
{
assert(nr_samples > 0);
layout->width0 = width0;
@@ -81,6 +81,11 @@ fdl6_layout(struct fdl_layout *layout,
layout->format = format;
layout->nr_samples = nr_samples;
if (depth0 > 1)
layout->ubwc = false;
if (tile_alignment[layout->cpp].ubwc_blockwidth == 0)
layout->ubwc = false;
const struct util_format_description *format_desc =
util_format_description(format);
uint32_t depth = depth0;
@@ -115,8 +120,7 @@ fdl6_layout(struct fdl_layout *layout,
for (uint32_t level = 0; level < mip_levels; level++) {
struct fdl_slice *slice = &layout->slices[level];
struct fdl_slice *ubwc_slice = &layout->ubwc_slices[level];
uint32_t tile_mode = (ubwc ?
layout->tile_mode : fdl_tile_mode(layout, level));
uint32_t tile_mode = fdl_tile_mode(layout, level);
uint32_t width, height;
/* tiled levels of 3D textures are rounded up to PoT dimensions: */
@@ -176,7 +180,7 @@ fdl6_layout(struct fdl_layout *layout,
layout->size += slice->size0 * depth * layers_in_level;
if (ubwc) {
if (layout->ubwc) {
/* with UBWC every level is aligned to 4K */
layout->size = align(layout->size, 4096);
@@ -219,7 +223,7 @@ fdl6_layout(struct fdl_layout *layout,
* get to program the UBWC and non-UBWC offset/strides
* independently.
*/
if (ubwc) {
if (layout->ubwc) {
for (uint32_t level = 0; level < mip_levels; level++)
layout->slices[level].offset += layout->ubwc_layer_size * array_size;
layout->size += layout->ubwc_layer_size * array_size;