gallium: rename PIPE_TRANSFER_* -> PIPE_MAP_*
Acked-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5749>
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@@ -754,49 +754,49 @@ the last (partial) page requires a box that ends at the end of the buffer
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.. _pipe_transfer:
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PIPE_TRANSFER
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PIPE_MAP
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^^^^^^^^^^^^^
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These flags control the behavior of a transfer object.
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``PIPE_TRANSFER_READ``
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``PIPE_MAP_READ``
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Resource contents read back (or accessed directly) at transfer create time.
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``PIPE_TRANSFER_WRITE``
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``PIPE_MAP_WRITE``
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Resource contents will be written back at transfer_unmap time (or modified
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as a result of being accessed directly).
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``PIPE_TRANSFER_MAP_DIRECTLY``
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``PIPE_MAP_DIRECTLY``
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a transfer should directly map the resource. May return NULL if not supported.
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``PIPE_TRANSFER_DISCARD_RANGE``
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``PIPE_MAP_DISCARD_RANGE``
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The memory within the mapped region is discarded. Cannot be used with
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``PIPE_TRANSFER_READ``.
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``PIPE_MAP_READ``.
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``PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE``
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``PIPE_MAP_DISCARD_WHOLE_RESOURCE``
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Discards all memory backing the resource. It should not be used with
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``PIPE_TRANSFER_READ``.
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``PIPE_MAP_READ``.
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``PIPE_TRANSFER_DONTBLOCK``
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``PIPE_MAP_DONTBLOCK``
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Fail if the resource cannot be mapped immediately.
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``PIPE_TRANSFER_UNSYNCHRONIZED``
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``PIPE_MAP_UNSYNCHRONIZED``
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Do not synchronize pending operations on the resource when mapping. The
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interaction of any writes to the map and any operations pending on the
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resource are undefined. Cannot be used with ``PIPE_TRANSFER_READ``.
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resource are undefined. Cannot be used with ``PIPE_MAP_READ``.
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``PIPE_TRANSFER_FLUSH_EXPLICIT``
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``PIPE_MAP_FLUSH_EXPLICIT``
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Written ranges will be notified later with :ref:`transfer_flush_region`.
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Cannot be used with ``PIPE_TRANSFER_READ``.
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Cannot be used with ``PIPE_MAP_READ``.
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``PIPE_TRANSFER_PERSISTENT``
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``PIPE_MAP_PERSISTENT``
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Allows the resource to be used for rendering while mapped.
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PIPE_RESOURCE_FLAG_MAP_PERSISTENT must be set when creating
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the resource.
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If COHERENT is not set, memory_barrier(PIPE_BARRIER_MAPPED_BUFFER)
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must be called to ensure the device can see what the CPU has written.
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``PIPE_TRANSFER_COHERENT``
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``PIPE_MAP_COHERENT``
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If PERSISTENT is set, this ensures any writes done by the device are
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immediately visible to the CPU and vice versa.
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PIPE_RESOURCE_FLAG_MAP_COHERENT must be set when creating
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@@ -909,4 +909,4 @@ uploaded data, unless:
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mapping, memory_barrier(PIPE_BARRIER_MAPPED_BUFFER) should be called on the
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context that has mapped the resource. No flush is required.
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* Mapping the resource with PIPE_TRANSFER_MAP_DIRECTLY.
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* Mapping the resource with PIPE_MAP_DIRECTLY.
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@@ -210,7 +210,7 @@ The integer capabilities:
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hardware implements the SM5 features, component selection,
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shadow comparison, and run-time offsets.
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* ``PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT``: Whether
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PIPE_TRANSFER_PERSISTENT and PIPE_TRANSFER_COHERENT are supported
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PIPE_MAP_PERSISTENT and PIPE_MAP_COHERENT are supported
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for buffers.
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* ``PIPE_CAP_TEXTURE_QUERY_LOD``: Whether the ``LODQ`` instruction is
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supported.
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