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intel: infer scalar'ness locally for brw_postprocess_nir

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Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23098>
This commit is contained in:
Rohan Garg
2023-05-17 16:44:17 +02:00
parent b214cf11b9
commit 212810ac8a
9 changed files with 27 additions and 28 deletions
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4
src/intel/compiler/brw_nir.h
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@@ -148,7 +148,6 @@ bool brw_nir_lower_mem_access_bit_sizes(nir_shader *shader,
void brw_postprocess_nir(nir_shader *nir,
const struct brw_compiler *compiler,
bool is_scalar,
bool debug_enabled,
bool robust_buffer_access);
@@ -200,8 +199,7 @@ bool brw_nir_blockify_uniform_loads(nir_shader *shader,
const struct intel_device_info *devinfo);
void brw_nir_optimize(nir_shader *nir,
const struct brw_compiler *compiler,
bool is_scalar);
const struct brw_compiler *compiler);
nir_shader *brw_nir_create_passthrough_tcs(void *mem_ctx,
const struct brw_compiler *compiler,