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intel: infer scalar'ness locally for brw_postprocess_nir

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Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23098>
This commit is contained in:
Rohan Garg
2023-05-17 16:44:17 +02:00
parent b214cf11b9
commit 212810ac8a
9 changed files with 27 additions and 28 deletions
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6
src/intel/compiler/brw_fs.cpp
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@@ -7484,7 +7484,7 @@ brw_compile_fs(const struct brw_compiler *compiler,
}
NIR_PASS(_, nir, brw_nir_move_interpolation_to_top);
brw_postprocess_nir(nir, compiler, true, debug_enabled,
brw_postprocess_nir(nir, compiler, debug_enabled,
key->base.robust_buffer_access);
brw_nir_populate_wm_prog_data(nir, compiler->devinfo, key, prog_data,
@@ -7849,7 +7849,7 @@ brw_compile_cs(const struct brw_compiler *compiler,
NIR_PASS(_, shader, nir_opt_constant_folding);
NIR_PASS(_, shader, nir_opt_dce);
brw_postprocess_nir(shader, compiler, true, debug_enabled,
brw_postprocess_nir(shader, compiler, debug_enabled,
key->base.robust_buffer_access);
v[simd] = std::make_unique<fs_visitor>(compiler, params->log_data, mem_ctx, &key->base,
@@ -7968,7 +7968,7 @@ compile_single_bs(const struct brw_compiler *compiler, void *log_data,
const unsigned max_dispatch_width = 16;
brw_nir_apply_key(shader, compiler, &key->base, max_dispatch_width, true);
brw_postprocess_nir(shader, compiler, true, debug_enabled,
brw_postprocess_nir(shader, compiler, debug_enabled,
key->base.robust_buffer_access);
brw_simd_selection_state simd_state{