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radv: replace cs.uses_task_rings by ms.has_task

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Task shaders always use a ring, so this field was useless somehow.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
This commit is contained in:
Samuel Pitoiset
2022-08-22 19:08:12 +02:00
committed by Marge Bot
parent 03d2af30f6
commit 20ebdc3c2b
3 changed files with 6 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
src/amd/vulkan/radv_pipeline.c
View File

@@ -3576,8 +3576,7 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
if (stages[MESA_SHADER_TASK].nir) { if (stages[MESA_SHADER_TASK].nir) {
/* Task/mesh I/O uses the task ring buffers. */ /* Task/mesh I/O uses the task ring buffers. */
stages[MESA_SHADER_TASK].info.cs.uses_task_rings = true; stages[MESA_SHADER_MESH].info.ms.has_task = true;
stages[MESA_SHADER_MESH].info.cs.uses_task_rings = true;
stages[MESA_SHADER_TASK].info.workgroup_size = stages[MESA_SHADER_TASK].info.workgroup_size =
ac_compute_cs_workgroup_size( ac_compute_cs_workgroup_size(

2
src/amd/vulkan/radv_shader.h
View File

@@ -349,7 +349,6 @@ struct radv_shader_info {
bool uses_sbt; bool uses_sbt;
bool uses_ray_launch_size; bool uses_ray_launch_size;
bool uses_task_rings;
} cs; } cs;
struct { struct {
uint64_t tes_inputs_read; uint64_t tes_inputs_read;
@@ -365,6 +364,7 @@ struct radv_shader_info {
struct radv_vs_output_info outinfo; struct radv_vs_output_info outinfo;
enum shader_prim output_prim; enum shader_prim output_prim;
bool needs_ms_scratch_ring; bool needs_ms_scratch_ring;
bool has_task; /* If mesh shader is used together with a task shader. */
} ms; } ms;
struct radv_streamout_info so; struct radv_streamout_info so;

8
src/amd/vulkan/radv_shader_args.c
View File

@@ -98,7 +98,7 @@ count_ms_user_sgprs(const struct radv_shader_info *info)
if (info->vs.needs_draw_id) if (info->vs.needs_draw_id)
count++; count++;
if (info->cs.uses_task_rings) if (info->ms.has_task)
count++; count++;
return count; return count;
@@ -179,7 +179,7 @@ allocate_user_sgprs(enum amd_gfx_level gfx_level, const struct radv_shader_info
user_sgpr_count += 2; user_sgpr_count += 2;
if (info->vs.needs_draw_id) if (info->vs.needs_draw_id)
user_sgpr_count += 1; user_sgpr_count += 1;
if (info->cs.uses_task_rings) if (stage == MESA_SHADER_TASK)
user_sgpr_count += 4; /* ring_entry, 2x ib_addr, ib_stride */ user_sgpr_count += 4; /* ring_entry, 2x ib_addr, ib_stride */
break; break;
case MESA_SHADER_FRAGMENT: case MESA_SHADER_FRAGMENT:
@@ -392,7 +392,7 @@ declare_ms_input_sgprs(const struct radv_shader_info *info, struct radv_shader_a
if (info->vs.needs_draw_id) { if (info->vs.needs_draw_id) {
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.draw_id); ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.draw_id);
} }
if (info->cs.uses_task_rings) { if (info->ms.has_task) {
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.task_ring_entry); ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.task_ring_entry);
} }
} }
@@ -592,7 +592,7 @@ radv_declare_shader_args(enum amd_gfx_level gfx_level, const struct radv_pipelin
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.draw_id); ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.draw_id);
} }
if (info->cs.uses_task_rings) { if (stage == MESA_SHADER_TASK) {
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.task_ring_entry); ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.task_ring_entry);
ac_add_arg(&args->ac, AC_ARG_SGPR, 2, AC_ARG_INT, &args->task_ib_addr); ac_add_arg(&args->ac, AC_ARG_SGPR, 2, AC_ARG_INT, &args->task_ib_addr);
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->task_ib_stride); ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->task_ib_stride);