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dri: Convert driCreateConfigs to use a gl_format enum

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This is instead of the pair of GLenums for format and type that were
previously used.  This is necessary for the Intel drivers to expose sRGB
framebuffer formats.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
This commit is contained in:
Ian Romanick
2012-07-12 13:52:06 -07:00
parent 43d6fe156b
commit 1f6e10f67b
7 changed files with 76 additions and 155 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
src/gallium/state_trackers/dri/common/dri_screen.c
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@@ -174,7 +174,7 @@ dri_fill_in_modes(struct dri_screen *screen,
} }
} }
configs_r5g6b5 = driCreateConfigs(GL_RGB, GL_UNSIGNED_SHORT_5_6_5, configs_r5g6b5 = driCreateConfigs(MESA_FORMAT_RGB565,
depth_bits_array, stencil_bits_array, depth_bits_array, stencil_bits_array,
depth_buffer_factor, back_buffer_modes, depth_buffer_factor, back_buffer_modes,
back_buffer_factor, back_buffer_factor,
@@ -193,7 +193,7 @@ dri_fill_in_modes(struct dri_screen *screen,
} }
} }
configs_a8r8g8b8 = driCreateConfigs(GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV, configs_a8r8g8b8 = driCreateConfigs(MESA_FORMAT_ARGB8888,
depth_bits_array, depth_bits_array,
stencil_bits_array, stencil_bits_array,
depth_buffer_factor, depth_buffer_factor,
@@ -215,7 +215,7 @@ dri_fill_in_modes(struct dri_screen *screen,
} }
} }
configs_x8r8g8b8 = driCreateConfigs(GL_BGR, GL_UNSIGNED_INT_8_8_8_8_REV, configs_x8r8g8b8 = driCreateConfigs(MESA_FORMAT_XRGB8888,
depth_bits_array, depth_bits_array,
stencil_bits_array, stencil_bits_array,
depth_buffer_factor, depth_buffer_factor,

138
src/mesa/drivers/dri/common/utils.c
View File

@@ -31,6 +31,7 @@
#include <string.h> #include <string.h>
#include <stdlib.h> #include <stdlib.h>
#include <stdbool.h>
#include "main/mtypes.h" #include "main/mtypes.h"
#include "main/cpuinfo.h" #include "main/cpuinfo.h"
#include "main/extensions.h" #include "main/extensions.h"
@@ -185,117 +186,56 @@ driGetRendererString( char * buffer, const char * hardware_name,
* \c GL_4HALF_16_16_16_16, etc. We can cross that bridge when we come to it. * \c GL_4HALF_16_16_16_16, etc. We can cross that bridge when we come to it.
*/ */
__DRIconfig ** __DRIconfig **
driCreateConfigs(GLenum fb_format, GLenum fb_type, driCreateConfigs(gl_format format,
const uint8_t * depth_bits, const uint8_t * stencil_bits, const uint8_t * depth_bits, const uint8_t * stencil_bits,
unsigned num_depth_stencil_bits, unsigned num_depth_stencil_bits,
const GLenum * db_modes, unsigned num_db_modes, const GLenum * db_modes, unsigned num_db_modes,
const uint8_t * msaa_samples, unsigned num_msaa_modes, const uint8_t * msaa_samples, unsigned num_msaa_modes,
GLboolean enable_accum) GLboolean enable_accum)
{ {
static const uint8_t bits_table[4][4] = { static const uint32_t masks_table[][4] = {
/* R G B A */ /* MESA_FORMAT_RGB565 */
{ 5, 6, 5, 0 }, /* Any GL_UNSIGNED_SHORT_5_6_5 */ { 0x0000F800, 0x000007E0, 0x0000001F, 0x00000000 },
{ 8, 8, 8, 0 }, /* Any RGB with any GL_UNSIGNED_INT_8_8_8_8 */ /* MESA_FORMAT_XRGB8888 */
{ 8, 8, 8, 8 } /* Any RGBA with any GL_UNSIGNED_INT_8_8_8_8 */ { 0x00FF0000, 0x0000FF00, 0x000000FF, 0x00000000 },
/* MESA_FORMAT_ARGB8888 */
{ 0x00FF0000, 0x0000FF00, 0x000000FF, 0xFF000000 },
}; };
static const uint32_t masks_table_rgb[6][4] = {
{ 0x0000F800, 0x000007E0, 0x0000001F, 0x00000000 }, /* 5_6_5 */
{ 0x0000001F, 0x000007E0, 0x0000F800, 0x00000000 }, /* 5_6_5_REV */
{ 0xFF000000, 0x00FF0000, 0x0000FF00, 0x00000000 }, /* 8_8_8_8 */
{ 0x000000FF, 0x0000FF00, 0x00FF0000, 0x00000000 } /* 8_8_8_8_REV */
};
static const uint32_t masks_table_rgba[6][4] = {
{ 0x0000F800, 0x000007E0, 0x0000001F, 0x00000000 }, /* 5_6_5 */
{ 0x0000001F, 0x000007E0, 0x0000F800, 0x00000000 }, /* 5_6_5_REV */
{ 0xFF000000, 0x00FF0000, 0x0000FF00, 0x000000FF }, /* 8_8_8_8 */
{ 0x000000FF, 0x0000FF00, 0x00FF0000, 0xFF000000 }, /* 8_8_8_8_REV */
};
static const uint32_t masks_table_bgr[6][4] = {
{ 0x0000001F, 0x000007E0, 0x0000F800, 0x00000000 }, /* 5_6_5 */
{ 0x0000F800, 0x000007E0, 0x0000001F, 0x00000000 }, /* 5_6_5_REV */
{ 0x0000FF00, 0x00FF0000, 0xFF000000, 0x00000000 }, /* 8_8_8_8 */
{ 0x00FF0000, 0x0000FF00, 0x000000FF, 0x00000000 }, /* 8_8_8_8_REV */
};
static const uint32_t masks_table_bgra[6][4] = {
{ 0x0000001F, 0x000007E0, 0x0000F800, 0x00000000 }, /* 5_6_5 */
{ 0x0000F800, 0x000007E0, 0x0000001F, 0x00000000 }, /* 5_6_5_REV */
{ 0x0000FF00, 0x00FF0000, 0xFF000000, 0x000000FF }, /* 8_8_8_8 */
{ 0x00FF0000, 0x0000FF00, 0x000000FF, 0xFF000000 }, /* 8_8_8_8_REV */
};
const uint8_t * bits;
const uint32_t * masks; const uint32_t * masks;
int index;
__DRIconfig **configs, **c; __DRIconfig **configs, **c;
struct gl_config *modes; struct gl_config *modes;
unsigned i, j, k, h; unsigned i, j, k, h;
unsigned num_modes; unsigned num_modes;
unsigned num_accum_bits = (enable_accum) ? 2 : 1; unsigned num_accum_bits = (enable_accum) ? 2 : 1;
int red_bits;
int green_bits;
int blue_bits;
int alpha_bits;
bool is_srgb;
switch ( fb_type ) { switch (format) {
case GL_UNSIGNED_SHORT_5_6_5: case MESA_FORMAT_RGB565:
index = 0; masks = masks_table[0];
break; break;
case GL_UNSIGNED_SHORT_5_6_5_REV: case MESA_FORMAT_XRGB8888:
index = 1; masks = masks_table[1];
break; break;
case GL_UNSIGNED_INT_8_8_8_8: case MESA_FORMAT_ARGB8888:
index = 2; masks = masks_table[2];
break; break;
case GL_UNSIGNED_INT_8_8_8_8_REV: default:
index = 3; fprintf(stderr, "[%s:%u] Unknown framebuffer type %s (%d).\n",
break; __FUNCTION__, __LINE__,
default: _mesa_get_format_name(format), format);
fprintf( stderr, "[%s:%u] Unknown framebuffer type 0x%04x.\n", return NULL;
__FUNCTION__, __LINE__, fb_type );
return NULL;
} }
red_bits = _mesa_get_format_bits(format, GL_RED_BITS);
/* Valid types are GL_UNSIGNED_SHORT_5_6_5 and GL_UNSIGNED_INT_8_8_8_8 and green_bits = _mesa_get_format_bits(format, GL_GREEN_BITS);
* the _REV versions. blue_bits = _mesa_get_format_bits(format, GL_BLUE_BITS);
* alpha_bits = _mesa_get_format_bits(format, GL_ALPHA_BITS);
* Valid formats are GL_RGBA, GL_RGB, and GL_BGRA. is_srgb = false;
*/
switch ( fb_format ) {
case GL_RGB:
masks = masks_table_rgb[ index ];
break;
case GL_RGBA:
masks = masks_table_rgba[ index ];
break;
case GL_BGR:
masks = masks_table_bgr[ index ];
break;
case GL_BGRA:
masks = masks_table_bgra[ index ];
break;
default:
fprintf( stderr, "[%s:%u] Unknown framebuffer format 0x%04x.\n",
__FUNCTION__, __LINE__, fb_format );
return NULL;
}
switch ( index ) {
case 0:
case 1:
bits = bits_table[0];
break;
default:
bits = ((fb_format == GL_RGB) || (fb_format == GL_BGR))
? bits_table[1]
: bits_table[2];
break;
}
num_modes = num_depth_stencil_bits * num_db_modes * num_accum_bits * num_msaa_modes; num_modes = num_depth_stencil_bits * num_db_modes * num_accum_bits * num_msaa_modes;
configs = calloc(1, (num_modes + 1) * sizeof *configs); configs = calloc(1, (num_modes + 1) * sizeof *configs);
@@ -312,10 +252,10 @@ driCreateConfigs(GLenum fb_format, GLenum fb_type,
c++; c++;
memset(modes, 0, sizeof *modes); memset(modes, 0, sizeof *modes);
modes->redBits = bits[0]; modes->redBits = red_bits;
modes->greenBits = bits[1]; modes->greenBits = green_bits;
modes->blueBits = bits[2]; modes->blueBits = blue_bits;
modes->alphaBits = bits[3]; modes->alphaBits = alpha_bits;
modes->redMask = masks[0]; modes->redMask = masks[0];
modes->greenMask = masks[1]; modes->greenMask = masks[1];
modes->blueMask = masks[2]; modes->blueMask = masks[2];
@@ -367,7 +307,7 @@ driCreateConfigs(GLenum fb_format, GLenum fb_type,
__DRI_ATTRIB_TEXTURE_2D_BIT | __DRI_ATTRIB_TEXTURE_2D_BIT |
__DRI_ATTRIB_TEXTURE_RECTANGLE_BIT; __DRI_ATTRIB_TEXTURE_RECTANGLE_BIT;
modes->sRGBCapable = GL_FALSE; modes->sRGBCapable = is_srgb;
} }
} }
} }

2
src/mesa/drivers/dri/common/utils.h
View File

@@ -48,7 +48,7 @@ struct __DRIconfigRec {
}; };
extern __DRIconfig ** extern __DRIconfig **
driCreateConfigs(GLenum fb_format, GLenum fb_type, driCreateConfigs(gl_format format,
const uint8_t * depth_bits, const uint8_t * stencil_bits, const uint8_t * depth_bits, const uint8_t * stencil_bits,
unsigned num_depth_stencil_bits, unsigned num_depth_stencil_bits,
const GLenum * db_modes, unsigned num_db_modes, const GLenum * db_modes, unsigned num_db_modes,

35
src/mesa/drivers/dri/intel/intel_screen.c
View File

@@ -912,6 +912,12 @@ intel_detect_swizzling(struct intel_screen *screen)
static __DRIconfig** static __DRIconfig**
intel_screen_make_configs(__DRIscreen *dri_screen) intel_screen_make_configs(__DRIscreen *dri_screen)
{ {
static const gl_format formats[3] = {
MESA_FORMAT_RGB565,
MESA_FORMAT_XRGB8888,
MESA_FORMAT_ARGB8888
};
/* GLX_SWAP_COPY_OML is not supported due to page flipping. */ /* GLX_SWAP_COPY_OML is not supported due to page flipping. */
static const GLenum back_buffer_modes[] = { static const GLenum back_buffer_modes[] = {
GLX_SWAP_UNDEFINED_OML, GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_NONE,
@@ -921,22 +927,11 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
static const uint8_t multisample_samples[2] = {4, 8}; static const uint8_t multisample_samples[2] = {4, 8};
struct intel_screen *screen = dri_screen->driverPrivate; struct intel_screen *screen = dri_screen->driverPrivate;
GLenum fb_format[3];
GLenum fb_type[3];
uint8_t depth_bits[4], stencil_bits[4]; uint8_t depth_bits[4], stencil_bits[4];
__DRIconfig **configs = NULL; __DRIconfig **configs = NULL;
fb_format[0] = GL_RGB;
fb_type[0] = GL_UNSIGNED_SHORT_5_6_5;
fb_format[1] = GL_BGR;
fb_type[1] = GL_UNSIGNED_INT_8_8_8_8_REV;
fb_format[2] = GL_BGRA;
fb_type[2] = GL_UNSIGNED_INT_8_8_8_8_REV;
/* Generate singlesample configs without accumulation buffer. */ /* Generate singlesample configs without accumulation buffer. */
for (int i = 0; i < ARRAY_SIZE(fb_format); i++) { for (int i = 0; i < ARRAY_SIZE(formats); i++) {
__DRIconfig **new_configs; __DRIconfig **new_configs;
const int num_depth_stencil_bits = 2; const int num_depth_stencil_bits = 2;
@@ -947,7 +942,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
depth_bits[0] = 0; depth_bits[0] = 0;
stencil_bits[0] = 0; stencil_bits[0] = 0;
if (fb_type[i] == GL_UNSIGNED_SHORT_5_6_5) { if (formats[i] == MESA_FORMAT_RGB565) {
depth_bits[1] = 16; depth_bits[1] = 16;
stencil_bits[1] = 0; stencil_bits[1] = 0;
} else { } else {
@@ -955,7 +950,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
stencil_bits[1] = 8; stencil_bits[1] = 8;
} }
new_configs = driCreateConfigs(fb_format[i], fb_type[i], new_configs = driCreateConfigs(formats[i],
depth_bits, depth_bits,
stencil_bits, stencil_bits,
num_depth_stencil_bits, num_depth_stencil_bits,
@@ -968,10 +963,10 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
/* Generate the minimum possible set of configs that include an /* Generate the minimum possible set of configs that include an
* accumulation buffer. * accumulation buffer.
*/ */
for (int i = 0; i < ARRAY_SIZE(fb_format); i++) { for (int i = 0; i < ARRAY_SIZE(formats); i++) {
__DRIconfig **new_configs; __DRIconfig **new_configs;
if (fb_type[i] == GL_UNSIGNED_SHORT_5_6_5) { if (formats[i] == MESA_FORMAT_RGB565) {
depth_bits[0] = 16; depth_bits[0] = 16;
stencil_bits[0] = 0; stencil_bits[0] = 0;
} else { } else {
@@ -979,7 +974,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
stencil_bits[0] = 8; stencil_bits[0] = 8;
} }
new_configs = driCreateConfigs(fb_format[i], fb_type[i], new_configs = driCreateConfigs(formats[i],
depth_bits, stencil_bits, 1, depth_bits, stencil_bits, 1,
back_buffer_modes, 1, back_buffer_modes, 1,
singlesample_samples, 1, singlesample_samples, 1,
@@ -1000,7 +995,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
* supported. Singlebuffer configs are not supported because no one wants * supported. Singlebuffer configs are not supported because no one wants
* them. * them.
*/ */
for (int i = 0; i < ARRAY_SIZE(fb_format); i++) { for (int i = 0; i < ARRAY_SIZE(formats); i++) {
if (screen->gen < 6) if (screen->gen < 6)
break; break;
@@ -1011,7 +1006,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
depth_bits[0] = 0; depth_bits[0] = 0;
stencil_bits[0] = 0; stencil_bits[0] = 0;
if (fb_type[i] == GL_UNSIGNED_SHORT_5_6_5) { if (formats[i] == MESA_FORMAT_RGB565) {
depth_bits[1] = 16; depth_bits[1] = 16;
stencil_bits[1] = 0; stencil_bits[1] = 0;
} else { } else {
@@ -1024,7 +1019,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
else if (screen->gen == 6) else if (screen->gen == 6)
num_msaa_modes = 1; num_msaa_modes = 1;
new_configs = driCreateConfigs(fb_format[i], fb_type[i], new_configs = driCreateConfigs(formats[i],
depth_bits, depth_bits,
stencil_bits, stencil_bits,
num_depth_stencil_bits, num_depth_stencil_bits,

16
src/mesa/drivers/dri/nouveau/nouveau_screen.c
View File

@@ -52,24 +52,20 @@ nouveau_get_configs(void)
const uint8_t stencil_bits[] = { 0, 0, 0, 8 }; const uint8_t stencil_bits[] = { 0, 0, 0, 8 };
const uint8_t msaa_samples[] = { 0 }; const uint8_t msaa_samples[] = { 0 };
const struct { static const gl_format formats[3] = {
GLenum format; MESA_FORMAT_RGB565,
GLenum type; MESA_FORMAT_ARGB8888,
} fb_formats[] = { MESA_FORMAT_XRGB8888,
{ GL_RGB , GL_UNSIGNED_SHORT_5_6_5 },
{ GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV },
{ GL_BGR , GL_UNSIGNED_INT_8_8_8_8_REV },
}; };
const GLenum back_buffer_modes[] = { const GLenum back_buffer_modes[] = {
GLX_NONE, GLX_SWAP_UNDEFINED_OML GLX_NONE, GLX_SWAP_UNDEFINED_OML
}; };
for (i = 0; i < Elements(fb_formats); i++) { for (i = 0; i < Elements(formats); i++) {
__DRIconfig **config; __DRIconfig **config;
config = driCreateConfigs(fb_formats[i].format, config = driCreateConfigs(formats[i],
fb_formats[i].type,
depth_bits, stencil_bits, depth_bits, stencil_bits,
Elements(depth_bits), Elements(depth_bits),
back_buffer_modes, back_buffer_modes,

20
src/mesa/drivers/dri/radeon/radeon_screen.c
View File

@@ -710,8 +710,11 @@ radeonDestroyBuffer(__DRIdrawable *driDrawPriv)
static const static const
__DRIconfig **radeonInitScreen2(__DRIscreen *psp) __DRIconfig **radeonInitScreen2(__DRIscreen *psp)
{ {
GLenum fb_format[3]; static const gl_format formats[3] = {
GLenum fb_type[3]; MESA_FORMAT_RGB565,
MESA_FORMAT_XRGB8888,
MESA_FORMAT_ARGB8888
};
/* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't /* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't
* support pageflipping at all. * support pageflipping at all.
*/ */
@@ -736,19 +739,10 @@ __DRIconfig **radeonInitScreen2(__DRIscreen *psp)
msaa_samples_array[0] = 0; msaa_samples_array[0] = 0;
fb_format[0] = GL_RGB; for (color = 0; color < ARRAY_SIZE(formats); color++) {
fb_type[0] = GL_UNSIGNED_SHORT_5_6_5;
fb_format[1] = GL_BGR;
fb_type[1] = GL_UNSIGNED_INT_8_8_8_8_REV;
fb_format[2] = GL_BGRA;
fb_type[2] = GL_UNSIGNED_INT_8_8_8_8_REV;
for (color = 0; color < ARRAY_SIZE(fb_format); color++) {
__DRIconfig **new_configs; __DRIconfig **new_configs;
new_configs = driCreateConfigs(fb_format[color], fb_type[color], new_configs = driCreateConfigs(formats[color],
depth_bits, depth_bits,
stencil_bits, stencil_bits,
ARRAY_SIZE(depth_bits), ARRAY_SIZE(depth_bits),

14
src/mesa/drivers/dri/swrast/swrast.c
View File

@@ -125,8 +125,7 @@ swrastFillInModes(__DRIscreen *psp,
__DRIconfig **configs; __DRIconfig **configs;
unsigned depth_buffer_factor; unsigned depth_buffer_factor;
unsigned back_buffer_factor; unsigned back_buffer_factor;
GLenum fb_format; gl_format format;
GLenum fb_type;
/* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't /* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't
* support pageflipping at all. * support pageflipping at all.
@@ -162,16 +161,13 @@ swrastFillInModes(__DRIscreen *psp,
switch (pixel_bits) { switch (pixel_bits) {
case 16: case 16:
fb_format = GL_RGB; format = MESA_FORMAT_RGB565;
fb_type = GL_UNSIGNED_SHORT_5_6_5;
break; break;
case 24: case 24:
fb_format = GL_BGR; format = MESA_FORMAT_XRGB8888;
fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
break; break;
case 32: case 32:
fb_format = GL_BGRA; format = MESA_FORMAT_ARGB8888;
fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
break; break;
default: default:
fprintf(stderr, "[%s:%u] bad depth %d\n", __func__, __LINE__, fprintf(stderr, "[%s:%u] bad depth %d\n", __func__, __LINE__,
@@ -179,7 +175,7 @@ swrastFillInModes(__DRIscreen *psp,
return NULL; return NULL;
} }
configs = driCreateConfigs(fb_format, fb_type, configs = driCreateConfigs(format,
depth_bits_array, stencil_bits_array, depth_bits_array, stencil_bits_array,
depth_buffer_factor, back_buffer_modes, depth_buffer_factor, back_buffer_modes,
back_buffer_factor, msaa_samples_array, 1, back_buffer_factor, msaa_samples_array, 1,