iris: Fix PIPE_CAP_UMA

If we have VRAM we're not exactly a unified memory architecture, are we?

Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18123>
This commit is contained in:
Kenneth Graunke
2022-08-17 16:24:24 -07:00
committed by Marge Bot
parent 2cea0d6ef6
commit 1ef43ea3c4

View File

@@ -237,7 +237,6 @@ iris_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_FS_FINE_DERIVATIVE:
case PIPE_CAP_SHADER_PACK_HALF_FLOAT:
case PIPE_CAP_ACCELERATED:
case PIPE_CAP_UMA:
case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
case PIPE_CAP_CLIP_HALFZ:
case PIPE_CAP_TGSI_TEXCOORD:
@@ -291,6 +290,8 @@ iris_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_IMAGE_STORE_FORMATTED:
case PIPE_CAP_LEGACY_MATH_RULES:
return true;
case PIPE_CAP_UMA:
return iris_bufmgr_vram_size(screen->bufmgr) == 0;
case PIPE_CAP_PREFER_BACK_BUFFER_REUSE:
return false;
case PIPE_CAP_FBFETCH: