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radv: pass the pipeline key to the shader info pass

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13085>
This commit is contained in:
Samuel Pitoiset
2021-09-27 13:23:48 +02:00
committed by Marge Bot
parent 0753615d10
commit 1eb428fa9f
3 changed files with 16 additions and 14 deletions
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18
src/amd/vulkan/radv_pipeline.c
View File

@@ -2872,7 +2872,8 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
if (nir[MESA_SHADER_FRAGMENT]) {
radv_nir_shader_info_init(&infos[MESA_SHADER_FRAGMENT]);
radv_nir_shader_info_pass(pipeline->device, nir[MESA_SHADER_FRAGMENT], pipeline->layout,
&keys[MESA_SHADER_FRAGMENT], &infos[MESA_SHADER_FRAGMENT]);
pipeline_key, &keys[MESA_SHADER_FRAGMENT],
&infos[MESA_SHADER_FRAGMENT]);
assert(pipeline->graphics.last_vgt_api_stage != MESA_SHADER_NONE);
if (infos[MESA_SHADER_FRAGMENT].ps.prim_id_input) {
@@ -2915,8 +2916,8 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
radv_nir_shader_info_init(&infos[MESA_SHADER_TESS_CTRL]);
for (int i = 0; i < 2; i++) {
radv_nir_shader_info_pass(pipeline->device, combined_nir[i], pipeline->layout, key,
&infos[MESA_SHADER_TESS_CTRL]);
radv_nir_shader_info_pass(pipeline->device, combined_nir[i], pipeline->layout, pipeline_key,
key, &infos[MESA_SHADER_TESS_CTRL]);
}
filled_stages |= (1 << MESA_SHADER_VERTEX);
@@ -2932,7 +2933,7 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
radv_nir_shader_info_init(&infos[MESA_SHADER_GEOMETRY]);
for (int i = 0; i < 2; i++) {
radv_nir_shader_info_pass(pipeline->device, combined_nir[i], pipeline->layout,
radv_nir_shader_info_pass(pipeline->device, combined_nir[i], pipeline->layout, pipeline_key,
&keys[pre_stage], &infos[MESA_SHADER_GEOMETRY]);
}
@@ -2944,7 +2945,8 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
while (active_stages) {
int i = u_bit_scan(&active_stages);
radv_nir_shader_info_init(&infos[i]);
radv_nir_shader_info_pass(pipeline->device, nir[i], pipeline->layout, &keys[i], &infos[i]);
radv_nir_shader_info_pass(pipeline->device, nir[i], pipeline->layout, pipeline_key, &keys[i],
&infos[i]);
}
if (nir[MESA_SHADER_COMPUTE]) {
@@ -3594,10 +3596,8 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
struct radv_shader_info info = {0};
struct radv_shader_variant_key key = {0};
key.has_multiview_view_index = keys[MESA_SHADER_GEOMETRY].has_multiview_view_index;
radv_nir_shader_info_pass(device, nir[MESA_SHADER_GEOMETRY], pipeline->layout, &key,
&info);
radv_nir_shader_info_pass(device, nir[MESA_SHADER_GEOMETRY], pipeline->layout, pipeline_key,
&key, &info);
info.wave_size = 64; /* Wave32 not supported. */
info.workgroup_size = 64; /* HW VS: separate waves, no workgroups */
info.ballot_bit_size = 64;

1
src/amd/vulkan/radv_private.h
View File

@@ -2589,6 +2589,7 @@ struct radv_shader_variant_key;
void radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *nir,
const struct radv_pipeline_layout *layout,
const struct radv_pipeline_key *pipeline_key,
const struct radv_shader_variant_key *key,
struct radv_shader_info *info);

11
src/amd/vulkan/radv_shader_info.c
View File

@@ -321,7 +321,7 @@ gather_info_block(const nir_shader *nir, const nir_block *block, struct radv_sha
static void
gather_info_input_decl_vs(const nir_shader *nir, const nir_variable *var,
struct radv_shader_info *info, const struct radv_shader_variant_key *key)
const struct radv_pipeline_key *key, struct radv_shader_info *info)
{
unsigned attrib_count = glsl_count_attribute_slots(var->type, true);
@@ -409,11 +409,11 @@ gather_info_input_decl_ps(const nir_shader *nir, const nir_variable *var,
static void
gather_info_input_decl(const nir_shader *nir, const nir_variable *var,
struct radv_shader_info *info, const struct radv_shader_variant_key *key)
const struct radv_pipeline_key *key, struct radv_shader_info *info)
{
switch (nir->info.stage) {
case MESA_SHADER_VERTEX:
gather_info_input_decl_vs(nir, var, info, key);
gather_info_input_decl_vs(nir, var, key, info);
break;
case MESA_SHADER_FRAGMENT:
gather_info_input_decl_ps(nir, var, info);
@@ -556,6 +556,7 @@ radv_nir_shader_info_init(struct radv_shader_info *info)
void
radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *nir,
const struct radv_pipeline_layout *layout,
const struct radv_pipeline_key *pipeline_key,
const struct radv_shader_variant_key *key, struct radv_shader_info *info)
{
struct nir_function *func = (struct nir_function *)exec_list_get_head_const(&nir->functions);
@@ -574,7 +575,7 @@ radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *n
}
nir_foreach_shader_in_variable (variable, nir)
gather_info_input_decl(nir, variable, info, key);
gather_info_input_decl(nir, variable, pipeline_key, info);
nir_foreach_block (block, func->impl) {
gather_info_block(nir, block, info);
@@ -587,7 +588,7 @@ radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *n
gather_xfb_info(nir, info);
/* Make sure to export the LayerID if the subpass has multiviews. */
if (key->has_multiview_view_index) {
if (pipeline_key->has_multiview_view_index) {
switch (nir->info.stage) {
case MESA_SHADER_VERTEX:
info->vs.outinfo.writes_layer = true;