intel/compiler: Emit ROR and ROL instruction
v2: Reorder patch (Matt Turner) Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
@@ -182,6 +182,8 @@ brw_compiler_create(void *mem_ctx, const struct gen_device_info *devinfo)
|
||||
nir_options->lower_ffma = devinfo->gen < 6;
|
||||
nir_options->lower_flrp32 = devinfo->gen < 6 || devinfo->gen >= 11;
|
||||
|
||||
nir_options->lower_rotate = devinfo->gen < 11;
|
||||
|
||||
nir_options->lower_int64_options = int64_options;
|
||||
nir_options->lower_doubles_options = fp64_options;
|
||||
compiler->glsl_compiler_options[i].NirOptions = nir_options;
|
||||
|
Reference in New Issue
Block a user