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anv: extend implicit fencing support for case requiring implicit write

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This change extends the coverage to ANV being the producer while
consumer is hardware encoder backed by iHD. So we'd apply implicit write
to bos backing render target images, which is mostly aligned with
i915_batch_submit tracking of the bos being writtern to.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27398>
This commit is contained in:
Yiwei Zhang
2024-01-31 14:59:35 -08:00
committed by Marge Bot
parent be3af5acf6
commit 1e80a426c2
1 changed files with 9 additions and 0 deletions
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9
src/intel/vulkan/anv_device.c
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@@ -4106,12 +4106,21 @@ VkResult anv_AllocateMemory(
/* wsi has its own way of synchronizing with the compositor */
if (!wsi_info && dedicated_info &&
dedicated_info->image != VK_NULL_HANDLE) {
ANV_FROM_HANDLE(anv_image, image, dedicated_info->image);
/* Apply implicit sync to be compatible with clients relying on
* implicit fencing. This matches the behavior in iris i915_batch
* submit. An example client is VA-API (iHD), so only dedicated
* image scenario has to be covered.
*/
alloc_flags |= ANV_BO_ALLOC_IMPLICIT_SYNC;
/* For color attachment, apply IMPLICIT_WRITE so a client on the
* consumer side relying on implicit fencing can have a fence to
* wait for render complete.
*/
if (image->vk.usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT)
alloc_flags |= ANV_BO_ALLOC_IMPLICIT_WRITE;
}
}