diff --git a/src/amd/llvm/ac_shader_abi.h b/src/amd/llvm/ac_shader_abi.h index d1f7d1ad035..af5f9893683 100644 --- a/src/amd/llvm/ac_shader_abi.h +++ b/src/amd/llvm/ac_shader_abi.h @@ -50,6 +50,7 @@ enum ac_descriptor_type */ struct ac_shader_abi { LLVMValueRef outputs[AC_LLVM_MAX_OUTPUTS * 4]; + LLVMValueRef inputs[AC_LLVM_MAX_OUTPUTS * 4]; /* These input registers sometimes need to be fixed up. */ LLVMValueRef vertex_id; @@ -58,13 +59,6 @@ struct ac_shader_abi { LLVMValueRef color0, color1; LLVMValueRef user_data; - /* For VS and PS: pre-loaded shader inputs. - * - * Currently only used for NIR shaders; indexed by variables' - * driver_location. - */ - LLVMValueRef *inputs; - /* Varying -> attribute number mapping. Also NIR-only */ unsigned fs_input_attr_indices[MAX_VARYING]; diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 378cedb0f5f..41c585598ca 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b/src/amd/vulkan/radv_nir_to_llvm.c @@ -40,8 +40,6 @@ #include "ac_shader_util.h" #include "sid.h" -#define RADEON_LLVM_MAX_INPUTS (VARYING_SLOT_VAR31 + 1) - struct radv_shader_context { struct ac_llvm_context ac; const struct nir_shader *shader; @@ -68,8 +66,6 @@ struct radv_shader_context { LLVMValueRef hs_ring_tess_offchip; LLVMValueRef hs_ring_tess_factor; - LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4]; - uint64_t output_mask; LLVMValueRef gs_next_vertex[4]; @@ -836,7 +832,7 @@ handle_vs_input_decl(struct radv_shader_context *ctx, struct nir_variable *varia load_vs_input(ctx, driver_location, type, output); for (unsigned chan = 0; chan < 4; chan++) { - ctx->inputs[ac_llvm_reg_index_soa(driver_location, chan)] = output[chan]; + ctx->abi.inputs[ac_llvm_reg_index_soa(driver_location, chan)] = output[chan]; } } } @@ -2474,7 +2470,6 @@ ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm, struct nir_shader *co create_function(&ctx, shaders[shader_count - 1]->info.stage, shader_count >= 2); - ctx.abi.inputs = &ctx.inputs[0]; ctx.abi.emit_outputs = handle_shader_outputs_post; ctx.abi.emit_vertex_with_counter = visit_emit_vertex_with_counter; ctx.abi.load_ubo = radv_load_ubo; diff --git a/src/gallium/drivers/radeonsi/si_shader_internal.h b/src/gallium/drivers/radeonsi/si_shader_internal.h index 12451b6a0ce..467e378f461 100644 --- a/src/gallium/drivers/radeonsi/si_shader_internal.h +++ b/src/gallium/drivers/radeonsi/si_shader_internal.h @@ -30,8 +30,6 @@ struct pipe_debug_callback; -#define RADEON_LLVM_MAX_INPUTS 32 * 4 - /* Ideally pass the sample mask input to the PS epilog as v14, which * is its usual location, so that the shader doesn't have to add v_mov. */ @@ -60,8 +58,6 @@ struct si_shader_context { struct ac_shader_args args; struct ac_shader_abi abi; - LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS]; - LLVMBasicBlockRef merged_wrap_if_entry_block; int merged_wrap_if_label; diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm.c b/src/gallium/drivers/radeonsi/si_shader_llvm.c index 2d643c58cf3..81841ec81ce 100644 --- a/src/gallium/drivers/radeonsi/si_shader_llvm.c +++ b/src/gallium/drivers/radeonsi/si_shader_llvm.c @@ -490,7 +490,6 @@ static bool si_nir_build_llvm(struct si_shader_context *ctx, struct nir_shader * si_llvm_declare_compute_memory(ctx); } - ctx->abi.inputs = &ctx->inputs[0]; ctx->abi.clamp_shadow_reference = true; ctx->abi.robust_buffer_access = true; ctx->abi.convert_undef_to_zero = true; diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm_vs.c b/src/gallium/drivers/radeonsi/si_shader_llvm_vs.c index d66618b9f91..9a05115e170 100644 --- a/src/gallium/drivers/radeonsi/si_shader_llvm_vs.c +++ b/src/gallium/drivers/radeonsi/si_shader_llvm_vs.c @@ -262,7 +262,7 @@ void si_llvm_load_vs_inputs(struct si_shader_context *ctx, struct nir_shader *ni load_input_vs(ctx, i, values); for (unsigned chan = 0; chan < 4; chan++) - ctx->inputs[i * 4 + chan] = ac_to_integer(&ctx->ac, values[chan]); + ctx->abi.inputs[i * 4 + chan] = ac_to_integer(&ctx->ac, values[chan]); } }