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freedreno/regs: Clarify polling on a7xx for CP_WAIT_REG_MEM/CP_COND_WRITE5

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Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
This commit is contained in:
Danylo Piliaiev
2023-07-05 15:57:41 +02:00
committed by Marge Bot
parent 1f192e49b6
commit 1dc044764d
9 changed files with 45 additions and 40 deletions
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2
src/freedreno/.gitlab-ci/reference/crash_prefetch.log
View File

@@ -1911,7 +1911,7 @@ got cmdszdw=83
event CACHE_INVALIDATE
0000000000000000: 0000: 70460001 00000031
opcode: CP_WAIT_REG_MEM (3c) (7 dwords)
{ FUNCTION = WRITE_EQ }
{ FUNCTION = WRITE_EQ | POLL = POLL_REGISTER }
{ POLL_ADDR_LO = 0x50f }
{ POLL_ADDR_HI = 0 }
{ REF = 0x1 }

50
src/freedreno/.gitlab-ci/reference/fd-clouds.log
View File

@@ -1167,7 +1167,7 @@ cmdstream[0]: 1023 dwords
event RB_DONE_TS
0000000001d91508: 0000: 70460004 00000016 01d90000 00000000 00000001
opcode: CP_WAIT_REG_MEM (3c) (7 dwords)
{ FUNCTION = WRITE_EQ | POLL_MEMORY }
{ FUNCTION = WRITE_EQ | POLL = POLL_MEMORY }
{ POLL_ADDR_LO = 0x1d90000 }
{ POLL_ADDR_HI = 0 }
{ REF = 0x1 }
@@ -1198,7 +1198,7 @@ cmdstream[0]: 1023 dwords
0000000001d91574: 0000: 00000000
0000000001d91568: 0000: 703d8003 01d90010 00000000 00000000
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc78 }
{ POLL_ADDR_HI = 0 }
{ REF = 0x440 }
@@ -1209,7 +1209,7 @@ cmdstream[0]: 1023 dwords
0000000001d91578: 0000: 70450008 00000105 00000c78 00000000 00000440 ffffffff 01d90010 00000000
0000000001d91598: 0020: 00000441
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc58 }
{ POLL_ADDR_HI = 0 }
{ REF = 0x1040 }
@@ -1220,7 +1220,7 @@ cmdstream[0]: 1023 dwords
0000000001d9159c: 0000: 70450008 00000105 00000c58 00000000 00001040 ffffffff 01d90010 00000000
0000000001d915bc: 0020: 00001043
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc79 }
{ POLL_ADDR_HI = 0 }
{ REF = 0x440 }
@@ -1231,7 +1231,7 @@ cmdstream[0]: 1023 dwords
0000000001d915c0: 0000: 70450008 00000105 00000c79 00000000 00000440 ffffffff 01d90010 00000000
0000000001d915e0: 0020: 00000441
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc59 }
{ POLL_ADDR_HI = 0 }
{ REF = 0x1040 }
@@ -1242,7 +1242,7 @@ cmdstream[0]: 1023 dwords
0000000001d915e4: 0000: 70450008 00000105 00000c59 00000000 00001040 ffffffff 01d90010 00000000
0000000001d91604: 0020: 00001043
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc7a }
{ POLL_ADDR_HI = 0 }
{ REF = 0x440 }
@@ -1253,7 +1253,7 @@ cmdstream[0]: 1023 dwords
0000000001d91608: 0000: 70450008 00000105 00000c7a 00000000 00000440 ffffffff 01d90010 00000000
0000000001d91628: 0020: 00000441
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc5a }
{ POLL_ADDR_HI = 0 }
{ REF = 0x1040 }
@@ -1264,7 +1264,7 @@ cmdstream[0]: 1023 dwords
0000000001d9162c: 0000: 70450008 00000105 00000c5a 00000000 00001040 ffffffff 01d90010 00000000
0000000001d9164c: 0020: 00001043
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc7b }
{ POLL_ADDR_HI = 0 }
{ REF = 0x440 }
@@ -1275,7 +1275,7 @@ cmdstream[0]: 1023 dwords
0000000001d91650: 0000: 70450008 00000105 00000c7b 00000000 00000440 ffffffff 01d90010 00000000
0000000001d91670: 0020: 00000441
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc5b }
{ POLL_ADDR_HI = 0 }
{ REF = 0x1040 }
@@ -1286,7 +1286,7 @@ cmdstream[0]: 1023 dwords
0000000001d91674: 0000: 70450008 00000105 00000c5b 00000000 00001040 ffffffff 01d90010 00000000
0000000001d91694: 0020: 00001043
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc7c }
{ POLL_ADDR_HI = 0 }
{ REF = 0x440 }
@@ -1297,7 +1297,7 @@ cmdstream[0]: 1023 dwords
0000000001d91698: 0000: 70450008 00000105 00000c7c 00000000 00000440 ffffffff 01d90010 00000000
0000000001d916b8: 0020: 00000441
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc5c }
{ POLL_ADDR_HI = 0 }
{ REF = 0x1040 }
@@ -1308,7 +1308,7 @@ cmdstream[0]: 1023 dwords
0000000001d916bc: 0000: 70450008 00000105 00000c5c 00000000 00001040 ffffffff 01d90010 00000000
0000000001d916dc: 0020: 00001043
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc7d }
{ POLL_ADDR_HI = 0 }
{ REF = 0x440 }
@@ -1319,7 +1319,7 @@ cmdstream[0]: 1023 dwords
0000000001d916e0: 0000: 70450008 00000105 00000c7d 00000000 00000440 ffffffff 01d90010 00000000
0000000001d91700: 0020: 00000441
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc5d }
{ POLL_ADDR_HI = 0 }
{ REF = 0x1040 }
@@ -1330,7 +1330,7 @@ cmdstream[0]: 1023 dwords
0000000001d91704: 0000: 70450008 00000105 00000c5d 00000000 00001040 ffffffff 01d90010 00000000
0000000001d91724: 0020: 00001043
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc7e }
{ POLL_ADDR_HI = 0 }
{ REF = 0x440 }
@@ -1341,7 +1341,7 @@ cmdstream[0]: 1023 dwords
0000000001d91728: 0000: 70450008 00000105 00000c7e 00000000 00000440 ffffffff 01d90010 00000000
0000000001d91748: 0020: 00000441
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc5e }
{ POLL_ADDR_HI = 0 }
{ REF = 0x1040 }
@@ -1352,7 +1352,7 @@ cmdstream[0]: 1023 dwords
0000000001d9174c: 0000: 70450008 00000105 00000c5e 00000000 00001040 ffffffff 01d90010 00000000
0000000001d9176c: 0020: 00001043
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc7f }
{ POLL_ADDR_HI = 0 }
{ REF = 0x440 }
@@ -1363,7 +1363,7 @@ cmdstream[0]: 1023 dwords
0000000001d91770: 0000: 70450008 00000105 00000c7f 00000000 00000440 ffffffff 01d90010 00000000
0000000001d91790: 0020: 00000441
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc5f }
{ POLL_ADDR_HI = 0 }
{ REF = 0x1040 }
@@ -1374,7 +1374,7 @@ cmdstream[0]: 1023 dwords
0000000001d91794: 0000: 70450008 00000105 00000c5f 00000000 00001040 ffffffff 01d90010 00000000
0000000001d917b4: 0020: 00001043
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc80 }
{ POLL_ADDR_HI = 0 }
{ REF = 0x440 }
@@ -1385,7 +1385,7 @@ cmdstream[0]: 1023 dwords
0000000001d917b8: 0000: 70450008 00000105 00000c80 00000000 00000440 ffffffff 01d90010 00000000
0000000001d917d8: 0020: 00000441
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc60 }
{ POLL_ADDR_HI = 0 }
{ REF = 0x1040 }
@@ -1396,7 +1396,7 @@ cmdstream[0]: 1023 dwords
0000000001d917dc: 0000: 70450008 00000105 00000c60 00000000 00001040 ffffffff 01d90010 00000000
0000000001d917fc: 0020: 00001043
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc81 }
{ POLL_ADDR_HI = 0 }
{ REF = 0x440 }
@@ -1407,7 +1407,7 @@ cmdstream[0]: 1023 dwords
0000000001d91800: 0000: 70450008 00000105 00000c81 00000000 00000440 ffffffff 01d90010 00000000
0000000001d91820: 0020: 00000441
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc61 }
{ POLL_ADDR_HI = 0 }
{ REF = 0x1040 }
@@ -1418,7 +1418,7 @@ cmdstream[0]: 1023 dwords
0000000001d91824: 0000: 70450008 00000105 00000c61 00000000 00001040 ffffffff 01d90010 00000000
0000000001d91844: 0020: 00001043
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc82 }
{ POLL_ADDR_HI = 0 }
{ REF = 0x440 }
@@ -1429,7 +1429,7 @@ cmdstream[0]: 1023 dwords
0000000001d91848: 0000: 70450008 00000105 00000c82 00000000 00000440 ffffffff 01d90010 00000000
0000000001d91868: 0020: 00000441
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc62 }
{ POLL_ADDR_HI = 0 }
{ REF = 0x1040 }
@@ -1440,7 +1440,7 @@ cmdstream[0]: 1023 dwords
0000000001d9186c: 0000: 70450008 00000105 00000c62 00000000 00001040 ffffffff 01d90010 00000000
0000000001d9188c: 0020: 00001043
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc83 }
{ POLL_ADDR_HI = 0 }
{ REF = 0x440 }
@@ -1451,7 +1451,7 @@ cmdstream[0]: 1023 dwords
0000000001d91890: 0000: 70450008 00000105 00000c83 00000000 00000440 ffffffff 01d90010 00000000
0000000001d918b0: 0020: 00000441
opcode: CP_COND_WRITE5 (45) (9 dwords)
{ FUNCTION = WRITE_GE | WRITE_MEMORY }
{ FUNCTION = WRITE_GE | POLL = POLL_REGISTER | WRITE_MEMORY }
{ POLL_ADDR_LO = 0xc63 }
{ POLL_ADDR_HI = 0 }
{ REF = 0x1040 }

2
src/freedreno/computerator/a6xx.cc
View File

@@ -394,7 +394,7 @@ cache_flush(struct fd_ringbuffer *ring, struct kernel *kernel)
OUT_PKT7(ring, CP_WAIT_REG_MEM, 6);
OUT_RING(ring, CP_WAIT_REG_MEM_0_FUNCTION(WRITE_EQ) |
CP_WAIT_REG_MEM_0_POLL_MEMORY);
CP_WAIT_REG_MEM_0_POLL(POLL_MEMORY));
OUT_RELOC(ring, control_ptr(a6xx_backend, seqno));
OUT_RING(ring, CP_WAIT_REG_MEM_3_REF(seqno));
OUT_RING(ring, CP_WAIT_REG_MEM_4_MASK(~0));

15
src/freedreno/registers/adreno/adreno_pm4.xml
View File

@@ -1387,13 +1387,19 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords)
</reg32>
</domain>
<enum name="poll_memory_type">
<value value="0" name="POLL_REGISTER"/>
<value value="1" name="POLL_MEMORY"/>
<value value="2" name="POLL_SCRATCH"/>
<value value="3" name="POLL_ON_CHIP" varset="chip" variants="A7XX-"/>
</enum>
<domain name="CP_COND_WRITE5" width="32">
<reg32 offset="0" name="0">
<bitfield name="FUNCTION" low="0" high="2" type="cp_cond_function"/>
<bitfield name="SIGNED_COMPARE" pos="3" type="boolean"/>
<!-- if both POLL_MEMORY and POLL_SCRATCH are false, it polls a register at POLL_ADDR_LO instead. -->
<bitfield name="POLL_MEMORY" pos="4" type="boolean"/>
<bitfield name="POLL_SCRATCH" pos="5" type="boolean"/>
<!-- POLL_REGISTER polls a register at POLL_ADDR_LO. -->
<bitfield name="POLL" low="4" high="5" type="poll_memory_type"/>
<bitfield name="WRITE_MEMORY" pos="8" type="boolean"/>
</reg32>
<reg32 offset="1" name="1">
@@ -1448,8 +1454,7 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords)
<reg32 offset="0" name="0">
<bitfield name="FUNCTION" low="0" high="2" type="cp_cond_function"/>
<bitfield name="SIGNED_COMPARE" pos="3" type="boolean"/>
<bitfield name="POLL_MEMORY" pos="4" type="boolean"/>
<bitfield name="POLL_SCRATCH" pos="5" type="boolean"/>
<bitfield name="POLL" low="4" high="5" type="poll_memory_type"/>
<bitfield name="WRITE_MEMORY" pos="8" type="boolean"/>
</reg32>
<reg32 offset="1" name="1">

2
src/freedreno/vulkan/tu_cmd_buffer.cc
View File

@@ -5518,7 +5518,7 @@ tu_CmdWaitEvents2(VkCommandBuffer commandBuffer,
tu_cs_emit_pkt7(cs, CP_WAIT_REG_MEM, 6);
tu_cs_emit(cs, CP_WAIT_REG_MEM_0_FUNCTION(WRITE_EQ) |
CP_WAIT_REG_MEM_0_POLL_MEMORY);
CP_WAIT_REG_MEM_0_POLL(POLL_MEMORY));
tu_cs_emit_qw(cs, event->bo->iova); /* POLL_ADDR_LO/HI */
tu_cs_emit(cs, CP_WAIT_REG_MEM_3_REF(1));
tu_cs_emit(cs, CP_WAIT_REG_MEM_4_MASK(~0u));

2
src/freedreno/vulkan/tu_cs_breadcrumbs.cc
View File

@@ -210,7 +210,7 @@ tu_cs_emit_sync_breadcrumb(struct tu_cs *cs, uint8_t opcode, uint16_t cnt)
/* Wait until CPU acknowledges the value written by GPU */
emit_pkt7(cs, CP_WAIT_REG_MEM, 6);
tu_cs_emit(cs, CP_WAIT_REG_MEM_0_FUNCTION(WRITE_EQ) |
CP_WAIT_REG_MEM_0_POLL_MEMORY);
CP_WAIT_REG_MEM_0_POLL(POLL_MEMORY));
tu_cs_emit_qw(
cs, device->global_bo->iova + gb_offset(breadcrumb_cpu_sync_seqno));
tu_cs_emit(cs, CP_WAIT_REG_MEM_3_REF(current_breadcrumb));

4
src/freedreno/vulkan/tu_query.cc
View File

@@ -637,7 +637,7 @@ emit_copy_query_pool_results(struct tu_cmd_buffer *cmdbuf,
if (flags & VK_QUERY_RESULT_WAIT_BIT) {
tu_cs_emit_pkt7(cs, CP_WAIT_REG_MEM, 6);
tu_cs_emit(cs, CP_WAIT_REG_MEM_0_FUNCTION(WRITE_EQ) |
CP_WAIT_REG_MEM_0_POLL_MEMORY);
CP_WAIT_REG_MEM_0_POLL(POLL_MEMORY));
tu_cs_emit_qw(cs, available_iova);
tu_cs_emit(cs, CP_WAIT_REG_MEM_3_REF(0x1));
tu_cs_emit(cs, CP_WAIT_REG_MEM_4_MASK(~0));
@@ -1138,7 +1138,7 @@ emit_end_occlusion_query(struct tu_cmd_buffer *cmdbuf,
tu_cs_emit_pkt7(cs, CP_WAIT_REG_MEM, 6);
tu_cs_emit(cs, CP_WAIT_REG_MEM_0_FUNCTION(WRITE_NE) |
CP_WAIT_REG_MEM_0_POLL_MEMORY);
CP_WAIT_REG_MEM_0_POLL(POLL_MEMORY));
tu_cs_emit_qw(cs, end_iova);
tu_cs_emit(cs, CP_WAIT_REG_MEM_3_REF(0xffffffff));
tu_cs_emit(cs, CP_WAIT_REG_MEM_4_MASK(~0));

2
src/gallium/drivers/freedreno/a6xx/fd6_emit.h
View File

@@ -251,7 +251,7 @@ fd6_cache_flush(struct fd_batch *batch, struct fd_ringbuffer *ring)
OUT_PKT7(ring, CP_WAIT_REG_MEM, 6);
OUT_RING(ring, CP_WAIT_REG_MEM_0_FUNCTION(WRITE_EQ) |
CP_WAIT_REG_MEM_0_POLL_MEMORY);
CP_WAIT_REG_MEM_0_POLL(POLL_MEMORY));
OUT_RELOC(ring, control_ptr(fd6_ctx, seqno));
OUT_RING(ring, CP_WAIT_REG_MEM_3_REF(seqno));
OUT_RING(ring, CP_WAIT_REG_MEM_4_MASK(~0));

6
src/gallium/drivers/freedreno/a6xx/fd6_query.cc
View File

@@ -116,7 +116,7 @@ occlusion_pause(struct fd_acc_query *aq, struct fd_batch *batch) assert_dt
OUT_PKT7(epilogue, CP_WAIT_REG_MEM, 6);
OUT_RING(epilogue, CP_WAIT_REG_MEM_0_FUNCTION(WRITE_NE) |
CP_WAIT_REG_MEM_0_POLL_MEMORY);
CP_WAIT_REG_MEM_0_POLL(POLL_MEMORY));
OUT_RELOC(epilogue, query_sample(aq, stop));
OUT_RING(epilogue, CP_WAIT_REG_MEM_3_REF(0xffffffff));
OUT_RING(epilogue, CP_WAIT_REG_MEM_4_MASK(0xffffffff));
@@ -172,7 +172,7 @@ occlusion_predicate_result_resource(struct fd_acc_query *aq, struct fd_ringbuffe
*/
OUT_PKT7(ring, CP_COND_WRITE5, 9);
OUT_RING(ring, CP_COND_WRITE5_0_FUNCTION(WRITE_NE) |
CP_COND_WRITE5_0_POLL_MEMORY |
CP_WAIT_REG_MEM_0_POLL(POLL_MEMORY) |
CP_COND_WRITE5_0_WRITE_MEMORY);
OUT_RELOC(ring, query_sample(aq, result)); /* POLL_ADDR_LO/HI */
OUT_RING(ring, CP_COND_WRITE5_3_REF(0));
@@ -716,7 +716,7 @@ so_overflow_predicate_result_resource(struct fd_acc_query *aq,
*/
OUT_PKT7(ring, CP_COND_WRITE5, 9);
OUT_RING(ring, CP_COND_WRITE5_0_FUNCTION(WRITE_NE) |
CP_COND_WRITE5_0_POLL_MEMORY |
CP_COND_WRITE5_0_POLL(POLL_MEMORY) |
CP_COND_WRITE5_0_WRITE_MEMORY);
OUT_RELOC(ring, dst->bo, offset, 0, 0); /* POLL_ADDR_LO/HI */
OUT_RING(ring, CP_COND_WRITE5_3_REF(0));