radv: realign vgt flush on hawaii workaround with radeonsi.
This realigns this code with the radeonsi version and fixes the indirect case to work properly. Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@@ -802,12 +802,18 @@ si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer,
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if (SI_GS_PER_ES / primgroup_size >= cmd_buffer->device->gs_table_depth - 3)
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partial_es_wave = true;
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/* Hw bug with single-primitive instances and SWITCH_ON_EOI
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* on multi-SE chips. */
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if (info->max_se >= 2 && ia_switch_on_eoi &&
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((instanced_draw || indirect_draw) &&
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num_prims <= 1))
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cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_VGT_FLUSH;
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/* GS hw bug with single-primitive instances and SWITCH_ON_EOI.
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* The hw doc says all multi-SE chips are affected, but amdgpu-pro Vulkan
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* only applies it to Hawaii. Do what amdgpu-pro Vulkan does.
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*/
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if (family == CHIP_HAWAII && ia_switch_on_eoi) {
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bool set_vgt_flush = indirect_draw;
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if (!set_vgt_flush && instanced_draw)
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if (num_prims <= 1)
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set_vgt_flush = true;
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if (set_vgt_flush)
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cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_VGT_FLUSH;
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}
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}
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return S_028AA8_SWITCH_ON_EOP(ia_switch_on_eop) |
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