diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index e37994002e3..cfe136532f4 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -107,7 +107,6 @@ get_nir_options_for_stage(struct radv_physical_device *device, gl_shader_stage s
          device->rad_info.has_accelerated_dot_product && device->rad_info.gfx_level < GFX11,
       .has_find_msb_rev = true,
       .has_pack_half_2x16_rtz = true,
-      .use_scoped_barrier = true,
       .has_fmulz = true,
       .max_unroll_iterations = 32,
       .max_unroll_iterations_aggressive = 128,
diff --git a/src/asahi/compiler/agx_compile.h b/src/asahi/compiler/agx_compile.h
index 7f9b2300e7a..2f82ceeff67 100644
--- a/src/asahi/compiler/agx_compile.h
+++ b/src/asahi/compiler/agx_compile.h
@@ -213,7 +213,6 @@ static const nir_shader_compiler_options agx_nir_options = {
    .use_interpolated_input_intrinsics = true,
    .lower_rotate = true,
    .has_isub = true,
-   .use_scoped_barrier = true,
    .support_16bit_alu = true,
    .max_unroll_iterations = 32,
    .lower_uniforms_to_ubo = true,
diff --git a/src/broadcom/vulkan/v3dv_pipeline.c b/src/broadcom/vulkan/v3dv_pipeline.c
index cd6bdc5a83e..0f8d38c138c 100644
--- a/src/broadcom/vulkan/v3dv_pipeline.c
+++ b/src/broadcom/vulkan/v3dv_pipeline.c
@@ -239,7 +239,6 @@ const nir_shader_compiler_options v3dv_nir_options = {
    .force_indirect_unrolling = (nir_var_shader_in | nir_var_function_temp),
    .divergence_analysis_options =
       nir_divergence_multiple_workgroup_per_compute_subgroup,
-   .use_scoped_barrier = true,
 };
 
 const nir_shader_compiler_options *
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index a116011f291..21bad64c591 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -3834,11 +3834,6 @@ typedef struct nir_shader_compiler_options {
    /** Backend supports sdot_2x16 and udot_2x16 opcodes. */
    bool has_dot_2x16;
 
-   /* Whether to generate only scoped_barrier intrinsics instead of the set of
-    * memory and control barrier intrinsics based on GLSL.
-    */
-   bool use_scoped_barrier;
-
    /** Backend supports fmulz (and ffmaz if lower_ffma32=false) */
    bool has_fmulz;
 
diff --git a/src/freedreno/ir3/ir3_compiler.c b/src/freedreno/ir3/ir3_compiler.c
index b55ca64ab39..175dbc6196e 100644
--- a/src/freedreno/ir3/ir3_compiler.c
+++ b/src/freedreno/ir3/ir3_compiler.c
@@ -116,7 +116,6 @@ static const nir_shader_compiler_options ir3_base_options = {
    .has_isub = true,
    .force_indirect_unrolling_sampler = true,
    .lower_uniforms_to_ubo = true,
-   .use_scoped_barrier = true,
    .max_unroll_iterations = 32,
 
    .lower_cs_local_index_to_id = true,
diff --git a/src/gallium/auxiliary/nir/nir_to_tgsi.c b/src/gallium/auxiliary/nir/nir_to_tgsi.c
index 35465d2dfad..0de77d47e04 100644
--- a/src/gallium/auxiliary/nir/nir_to_tgsi.c
+++ b/src/gallium/auxiliary/nir/nir_to_tgsi.c
@@ -3954,7 +3954,6 @@ static const nir_shader_compiler_options nir_to_tgsi_compiler_options = {
    .lower_vector_cmp = true,
    .lower_int64_options = nir_lower_imul_2x32_64,
    .use_interpolated_input_intrinsics = true,
-   .use_scoped_barrier = true,
 
    /* TGSI doesn't have a semantic for local or global index, just local and
     * workgroup id.
diff --git a/src/gallium/drivers/i915/i915_screen.c b/src/gallium/drivers/i915/i915_screen.c
index fd9bece25dd..01f2cb8f909 100644
--- a/src/gallium/drivers/i915/i915_screen.c
+++ b/src/gallium/drivers/i915/i915_screen.c
@@ -120,7 +120,6 @@ static const nir_shader_compiler_options i915_compiler_options = {
    .lower_uniforms_to_ubo = true,
    .lower_vector_cmp = true,
    .use_interpolated_input_intrinsics = true,
-   .use_scoped_barrier = true,
    .force_indirect_unrolling = nir_var_all,
    .force_indirect_unrolling_sampler = true,
    .max_unroll_iterations = 32,
diff --git a/src/gallium/drivers/llvmpipe/lp_screen.c b/src/gallium/drivers/llvmpipe/lp_screen.c
index 133751344e2..d67f285c20f 100644
--- a/src/gallium/drivers/llvmpipe/lp_screen.c
+++ b/src/gallium/drivers/llvmpipe/lp_screen.c
@@ -623,7 +623,6 @@ static const struct nir_shader_compiler_options gallivm_nir_options = {
    .lower_device_index_to_zero = true,
    .support_16bit_alu = true,
    .lower_fisnormal = true,
-   .use_scoped_barrier = true,
 };
 
 
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_screen.c b/src/gallium/drivers/nouveau/nv30/nv30_screen.c
index f1872ca09b9..78597f7936e 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_screen.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_screen.c
@@ -490,7 +490,6 @@ static const nir_shader_compiler_options nv30_base_compiler_options = {
    .no_integers = true,
 
    .use_interpolated_input_intrinsics = true,
-   .use_scoped_barrier = true,
 };
 
 static const void *
diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c
index 2eeb61d3172..c096dbc0b2c 100644
--- a/src/gallium/drivers/r300/r300_screen.c
+++ b/src/gallium/drivers/r300/r300_screen.c
@@ -507,8 +507,7 @@ static int r300_get_video_param(struct pipe_screen *screen,
    .lower_uniforms_to_ubo = true,             \
    .lower_vector_cmp = true,                  \
    .no_integers = true,                       \
-   .use_interpolated_input_intrinsics = true, \
-   .use_scoped_barrier = true
+   .use_interpolated_input_intrinsics = true
 
 static const nir_shader_compiler_options r500_vs_compiler_options = {
    COMMON_NIR_OPTIONS,
diff --git a/src/gallium/drivers/r600/r600_pipe_common.c b/src/gallium/drivers/r600/r600_pipe_common.c
index 0c6fec0cb9f..c47e1dfe551 100644
--- a/src/gallium/drivers/r600/r600_pipe_common.c
+++ b/src/gallium/drivers/r600/r600_pipe_common.c
@@ -1372,7 +1372,6 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen,
 		.lower_uniforms_to_ubo = true,
 		.lower_image_offset_to_range_base = 1,
 		.vectorize_tess_levels = 1,
-		.use_scoped_barrier = 1,
 	};
 
 	rscreen->nir_options = nir_options;
diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c
index 2c436a94e89..2fb1e1d5781 100644
--- a/src/gallium/drivers/radeonsi/si_get.c
+++ b/src/gallium/drivers/radeonsi/si_get.c
@@ -1323,7 +1323,6 @@ void si_init_screen_get_functions(struct si_screen *sscreen)
          nir_lower_imul64 | nir_lower_imul_high64 | nir_lower_imul_2x32_64 |
          nir_lower_divmod64 | nir_lower_minmax64 | nir_lower_iabs64 |
          nir_lower_iadd_sat64,
-      .use_scoped_barrier = true,
    };
    sscreen->nir_options = nir_options;
 }
diff --git a/src/gallium/drivers/softpipe/sp_screen.c b/src/gallium/drivers/softpipe/sp_screen.c
index 10468333ff0..7e096a02162 100644
--- a/src/gallium/drivers/softpipe/sp_screen.c
+++ b/src/gallium/drivers/softpipe/sp_screen.c
@@ -91,7 +91,6 @@ static const nir_shader_compiler_options sp_compiler_options = {
    .lower_int64_options = nir_lower_imul_2x32_64,
    .max_unroll_iterations = 32,
    .use_interpolated_input_intrinsics = true,
-   .use_scoped_barrier = true,
 
    /* TGSI doesn't have a semantic for local or global index, just local and
     * workgroup id.
diff --git a/src/gallium/drivers/svga/svga_screen.c b/src/gallium/drivers/svga/svga_screen.c
index 5f6eb52c729..e23eb07e7c8 100644
--- a/src/gallium/drivers/svga/svga_screen.c
+++ b/src/gallium/drivers/svga/svga_screen.c
@@ -752,8 +752,7 @@ vgpu10_get_shader_param(struct pipe_screen *screen,
    .lower_vector_cmp = true,                                                  \
    .lower_cs_local_index_to_id = true,                                        \
    .max_unroll_iterations = 32,                                               \
-   .use_interpolated_input_intrinsics = true,                                 \
-   .use_scoped_barrier = true
+   .use_interpolated_input_intrinsics = true
 
 #define VGPU10_OPTIONS                                                        \
    .lower_doubles_options = nir_lower_dfloor,                                 \
diff --git a/src/gallium/drivers/v3d/v3d_screen.c b/src/gallium/drivers/v3d/v3d_screen.c
index 18f8029b206..bce1eeafcd9 100644
--- a/src/gallium/drivers/v3d/v3d_screen.c
+++ b/src/gallium/drivers/v3d/v3d_screen.c
@@ -742,7 +742,6 @@ static const nir_shader_compiler_options v3d_nir_options = {
          */
         .max_unroll_iterations = 16,
         .force_indirect_unrolling_sampler = true,
-        .use_scoped_barrier = true,
 };
 
 static const void *
diff --git a/src/gallium/drivers/zink/zink_compiler.c b/src/gallium/drivers/zink/zink_compiler.c
index 466b9688296..9cc2ce3530b 100644
--- a/src/gallium/drivers/zink/zink_compiler.c
+++ b/src/gallium/drivers/zink/zink_compiler.c
@@ -1386,7 +1386,6 @@ zink_screen_init_compiler(struct zink_screen *screen)
       .has_isub = true,
       .has_txs = true,
       .lower_mul_2x32_64 = true,
-      .use_scoped_barrier = true,
       .support_16bit_alu = true, /* not quite what it sounds like */
       .max_unroll_iterations = 0,
    };
diff --git a/src/intel/compiler/brw_compiler.c b/src/intel/compiler/brw_compiler.c
index 0c7dc3f8401..08011885f4d 100644
--- a/src/intel/compiler/brw_compiler.c
+++ b/src/intel/compiler/brw_compiler.c
@@ -49,7 +49,6 @@
    .lower_insert_word = true,                                                 \
    .vertex_id_zero_based = true,                                              \
    .lower_base_vertex = true,                                                 \
-   .use_scoped_barrier = true,                                                \
    .support_16bit_alu = true,                                                 \
    .lower_uniforms_to_ubo = true,                                             \
    .has_txs = true
diff --git a/src/microsoft/compiler/nir_to_dxil.c b/src/microsoft/compiler/nir_to_dxil.c
index 484ae9b0fd7..00e1d59799d 100644
--- a/src/microsoft/compiler/nir_to_dxil.c
+++ b/src/microsoft/compiler/nir_to_dxil.c
@@ -137,7 +137,6 @@ nir_options = {
    .lower_interpolate_at = true,
    .has_fsub = true,
    .has_isub = true,
-   .use_scoped_barrier = true,
    .vertex_id_zero_based = true,
    .lower_base_vertex = true,
    .lower_helper_invocation = true,
diff --git a/src/nouveau/codegen/nv50_ir_from_nir.cpp b/src/nouveau/codegen/nv50_ir_from_nir.cpp
index 06744d5e2bb..54674122193 100644
--- a/src/nouveau/codegen/nv50_ir_from_nir.cpp
+++ b/src/nouveau/codegen/nv50_ir_from_nir.cpp
@@ -3397,7 +3397,6 @@ nvir_nir_shader_compiler_options(int chipset, uint8_t shader_type)
        */
       ((chipset >= NVISA_GV100_CHIPSET && shader_type == PIPE_SHADER_FRAGMENT) ? nir_var_shader_in : 0)
    );
-   op.use_scoped_barrier = true;
    op.force_indirect_unrolling_sampler = (chipset < NVISA_GF100_CHIPSET);
    op.max_unroll_iterations = 32;
    op.lower_int64_options = (nir_lower_int64_options) (
diff --git a/src/panfrost/compiler/bifrost_compile.h b/src/panfrost/compiler/bifrost_compile.h
index 4f2a38f79f8..159b0da9f18 100644
--- a/src/panfrost/compiler/bifrost_compile.h
+++ b/src/panfrost/compiler/bifrost_compile.h
@@ -99,8 +99,6 @@ void bifrost_compile_shader_nir(nir_shader *nir,
       .force_indirect_unrolling =                                              \
          (nir_var_shader_in | nir_var_shader_out | nir_var_function_temp),     \
       .force_indirect_unrolling_sampler = true,                                \
-                                                                               \
-      .use_scoped_barrier = true,                                              \
    };
 
 DEFINE_OPTIONS(6);
diff --git a/src/panfrost/midgard/midgard_compile.h b/src/panfrost/midgard/midgard_compile.h
index e2fb10bc7de..9eb2be02d71 100644
--- a/src/panfrost/midgard/midgard_compile.h
+++ b/src/panfrost/midgard/midgard_compile.h
@@ -104,8 +104,6 @@ static const nir_shader_compiler_options midgard_nir_options = {
    .force_indirect_unrolling =
       (nir_var_shader_in | nir_var_shader_out | nir_var_function_temp),
    .force_indirect_unrolling_sampler = true,
-
-   .use_scoped_barrier = true,
 };
 
 #endif