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iris: track depth/stencil writes enabled

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This commit is contained in:
Kenneth Graunke
2018-08-18 23:21:41 -07:00
parent 3fecb1c44d
commit 1d33982e9b
2 changed files with 19 additions and 2 deletions
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6
src/gallium/drivers/iris/iris_context.h
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@@ -345,6 +345,12 @@ struct iris_context {
struct pipe_stencil_ref stencil_ref; struct pipe_stencil_ref stencil_ref;
struct pipe_framebuffer_state framebuffer; struct pipe_framebuffer_state framebuffer;
/** Are depth writes enabled? (Depth buffer may or may not exist.) */
bool depth_writes_enabled;
/** Are stencil writes enabled? (Stencil buffer may or may not exist.) */
bool stencil_writes_enabled;
/** GenX-specific current state */ /** GenX-specific current state */
struct iris_genx_state *genx; struct iris_genx_state *genx;

15
src/gallium/drivers/iris/iris_state.c
View File

@@ -707,6 +707,10 @@ struct iris_depth_stencil_alpha_state {
/** Outbound to BLEND_STATE, 3DSTATE_PS_BLEND, COLOR_CALC_STATE. */ /** Outbound to BLEND_STATE, 3DSTATE_PS_BLEND, COLOR_CALC_STATE. */
struct pipe_alpha_state alpha; struct pipe_alpha_state alpha;
/** Outbound to resolve and cache set tracking. */
bool depth_writes_enabled;
bool stencil_writes_enabled;
}; };
/** /**
@@ -722,10 +726,14 @@ iris_create_zsa_state(struct pipe_context *ctx,
struct iris_depth_stencil_alpha_state *cso = struct iris_depth_stencil_alpha_state *cso =
malloc(sizeof(struct iris_depth_stencil_alpha_state)); malloc(sizeof(struct iris_depth_stencil_alpha_state));
cso->alpha = state->alpha;
bool two_sided_stencil = state->stencil[1].enabled; bool two_sided_stencil = state->stencil[1].enabled;
cso->alpha = state->alpha;
cso->depth_writes_enabled = state->depth.writemask;
cso->stencil_writes_enabled =
state->stencil[0].writemask != 0 ||
(two_sided_stencil && state->stencil[1].writemask != 1);
/* The state tracker needs to optimize away EQUAL writes for us. */ /* The state tracker needs to optimize away EQUAL writes for us. */
assert(!(state->depth.func == PIPE_FUNC_EQUAL && state->depth.writemask)); assert(!(state->depth.func == PIPE_FUNC_EQUAL && state->depth.writemask));
@@ -779,6 +787,9 @@ iris_bind_zsa_state(struct pipe_context *ctx, void *state)
if (cso_changed(alpha.func)) if (cso_changed(alpha.func))
ice->state.dirty |= IRIS_DIRTY_BLEND_STATE; ice->state.dirty |= IRIS_DIRTY_BLEND_STATE;
ice->state.depth_writes_enabled = new_cso->depth_writes_enabled;
ice->state.stencil_writes_enabled = new_cso->stencil_writes_enabled;
} }
ice->state.cso_zsa = new_cso; ice->state.cso_zsa = new_cso;