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broadcom/compiler: track pipelineable ldvary sequences

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If we have two (or more) smooth varyings like this:

nop t3; ldvary.rf0
fmul t5, t3, t0
fadd t6, t5, r5
nop t7; ldvary.rf0
fmul t9, t7, t0
fadd t10, t9, r5
nop t11; ldvary.rf0
fmul t13, t11, t0
fadd t14, t13, r5

We may be able to pipeline them like this:

nop                  ; nop               ; ldvary.r4
nop                  ; fmul  r0, r4, rf0 ; ldvary.r1
fadd  rf13, r0, r5   ; fmul  r2, r1, rf0 ; ldvary.r3
fadd  rf12, r2, r5   ; fmul  r4, r3, rf0 ; ldvary.r0

But in order to do this, we will need to manually tweak the
QPU scheduling.

This patch tracks information about ldvary sequences that are
good candidates for pipelining, and a follow-up patch will
use this information to pipeline them when we emit the QPU
code.

v2 (apinheiro):
  - Rename the v3d_compile fields to avoid confusion with the qinst fields.
  - Assert that a sequence's start instruction is not the same as the end.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9304>
This commit is contained in:
Iago Toral Quiroga
2021-02-26 12:23:12 +01:00
parent c2c2cdc3d3
commit 1d021539a2
2 changed files with 83 additions and 6 deletions
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18
src/broadcom/compiler/v3d_compiler.h
View File

@@ -162,6 +162,19 @@ struct qinst {
* otherwise.
*/
int uniform;
/* Set if this instruction participates in a pipelinable sequence of
* smooth varyings.
*/
bool ldvary_pipelining;
/* Set if this is the ldvary instruction starting a pipelinable
* sequence of smooth varyings.
*/
bool ldvary_pipelining_start;
/* Set if this is the fadd instruction ending a pipelinable
* sequence of smooth varyings.
*/
bool ldvary_pipelining_end;
};
enum quniform_contents {
@@ -769,6 +782,11 @@ struct v3d_compile {
uint32_t program_id;
uint32_t variant_id;
/* Used to track pipelinable sequences of smooth varyings */
struct qinst *ldvary_sequence_start_inst;
struct qinst *ldvary_sequence_end_inst;
uint32_t ldvary_sequence_length;
/* Set to compile program in in 1x, 2x, or 4x threaded mode, where
* SIG_THREAD_SWITCH is used to hide texturing latency at the cost of
* limiting ourselves to the part of the physical reg space.