From 1c718952c8d2a8436f679cde1de38d9acd9a23f2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Tapani=20P=C3=A4lli?= Date: Thu, 15 Apr 2021 11:13:49 +0300 Subject: [PATCH] anv: support primitive restart enable dynamic state MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Tapani Pälli Reviewed-by: Lionel Landwerlin Part-of: --- src/intel/vulkan/anv_cmd_buffer.c | 13 +++++++++++++ src/intel/vulkan/anv_pipeline.c | 7 ++++++- src/intel/vulkan/anv_private.h | 2 +- src/intel/vulkan/gfx7_cmd_buffer.c | 7 ++++--- src/intel/vulkan/gfx8_cmd_buffer.c | 5 +++-- 5 files changed, 27 insertions(+), 7 deletions(-) diff --git a/src/intel/vulkan/anv_cmd_buffer.c b/src/intel/vulkan/anv_cmd_buffer.c index 6c5a7d0c457..d56cc7a9290 100644 --- a/src/intel/vulkan/anv_cmd_buffer.c +++ b/src/intel/vulkan/anv_cmd_buffer.c @@ -103,6 +103,7 @@ const struct anv_dynamic_state default_dynamic_state = { .color_writes = 0xff, .raster_discard = 0, .depth_bias_enable = 0, + .primitive_restart_enable = 0, }; /** @@ -193,6 +194,7 @@ anv_dynamic_state_copy(struct anv_dynamic_state *dest, ANV_CMP_COPY(raster_discard, ANV_CMD_DIRTY_DYNAMIC_RASTERIZER_DISCARD_ENABLE); ANV_CMP_COPY(depth_bias_enable, ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS_ENABLE); + ANV_CMP_COPY(primitive_restart_enable, ANV_CMD_DIRTY_DYNAMIC_PRIMITIVE_RESTART_ENABLE); if (copy_mask & ANV_CMD_DIRTY_DYNAMIC_SAMPLE_LOCATIONS) { dest->sample_locations.samples = src->sample_locations.samples; @@ -531,6 +533,17 @@ void anv_CmdSetDepthBiasEnableEXT( cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS_ENABLE; } +void anv_CmdSetPrimitiveRestartEnableEXT( + VkCommandBuffer commandBuffer, + VkBool32 primitiveRestartEnable) +{ + ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); + + cmd_buffer->state.gfx.dynamic.primitive_restart_enable = primitiveRestartEnable; + + cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_PRIMITIVE_RESTART_ENABLE; +} + void anv_CmdSetViewport( VkCommandBuffer commandBuffer, uint32_t firstViewport, diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index d5b3522614d..1dd3682b585 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -2002,6 +2002,12 @@ copy_non_dynamic_state(struct anv_graphics_pipeline *pipeline, pCreateInfo->pRasterizationState->depthBiasEnable; } + if (states & ANV_CMD_DIRTY_DYNAMIC_PRIMITIVE_RESTART_ENABLE) { + assert(pCreateInfo->pInputAssemblyState); + dynamic->primitive_restart_enable = + pCreateInfo->pInputAssemblyState->primitiveRestartEnable; + } + /* Section 9.2 of the Vulkan 1.0.15 spec says: * * pColorBlendState is [...] NULL if the pipeline has rasterization @@ -2387,7 +2393,6 @@ anv_graphics_pipeline_init(struct anv_graphics_pipeline *pipeline, pCreateInfo->pInputAssemblyState; const VkPipelineTessellationStateCreateInfo *tess_info = pCreateInfo->pTessellationState; - pipeline->primitive_restart = ia_info->primitiveRestartEnable; if (anv_pipeline_has_stage(pipeline, MESA_SHADER_TESS_EVAL)) pipeline->topology = _3DPRIM_PATCHLIST(tess_info->patchControlPoints); diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index e947fb8ee02..47bbd491d27 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -2678,6 +2678,7 @@ struct anv_dynamic_state { bool stencil_test_enable; bool raster_discard; bool depth_bias_enable; + bool primitive_restart_enable; bool dyn_vbo_stride; bool dyn_vbo_size; @@ -3393,7 +3394,6 @@ struct anv_graphics_pipeline { VkShaderStageFlags active_stages; - bool primitive_restart; bool writes_depth; bool depth_test_enable; bool writes_stencil; diff --git a/src/intel/vulkan/gfx7_cmd_buffer.c b/src/intel/vulkan/gfx7_cmd_buffer.c index 2e5ccb22c44..ae3d7354680 100644 --- a/src/intel/vulkan/gfx7_cmd_buffer.c +++ b/src/intel/vulkan/gfx7_cmd_buffer.c @@ -312,20 +312,21 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer) if (cmd_buffer->state.gfx.gfx7.index_buffer && cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE | - ANV_CMD_DIRTY_INDEX_BUFFER)) { + ANV_CMD_DIRTY_INDEX_BUFFER | + ANV_CMD_DIRTY_DYNAMIC_PRIMITIVE_RESTART_ENABLE)) { struct anv_buffer *buffer = cmd_buffer->state.gfx.gfx7.index_buffer; uint32_t offset = cmd_buffer->state.gfx.gfx7.index_offset; #if GFX_VERx10 == 75 anv_batch_emit(&cmd_buffer->batch, GFX75_3DSTATE_VF, vf) { - vf.IndexedDrawCutIndexEnable = pipeline->primitive_restart; + vf.IndexedDrawCutIndexEnable = d->primitive_restart_enable; vf.CutIndex = cmd_buffer->state.restart_index; } #endif anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_INDEX_BUFFER), ib) { #if GFX_VERx10 != 75 - ib.CutIndexEnable = pipeline->primitive_restart; + ib.CutIndexEnable = d->primitive_restart_enable; #endif ib.IndexFormat = cmd_buffer->state.gfx.gfx7.index_type; ib.MOCS = anv_mocs(cmd_buffer->device, diff --git a/src/intel/vulkan/gfx8_cmd_buffer.c b/src/intel/vulkan/gfx8_cmd_buffer.c index 9601ddc455b..e70b4173915 100644 --- a/src/intel/vulkan/gfx8_cmd_buffer.c +++ b/src/intel/vulkan/gfx8_cmd_buffer.c @@ -630,9 +630,10 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer) } if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE | - ANV_CMD_DIRTY_INDEX_BUFFER)) { + ANV_CMD_DIRTY_INDEX_BUFFER | + ANV_CMD_DIRTY_DYNAMIC_PRIMITIVE_RESTART_ENABLE)) { anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_VF), vf) { - vf.IndexedDrawCutIndexEnable = pipeline->primitive_restart; + vf.IndexedDrawCutIndexEnable = d->primitive_restart_enable; vf.CutIndex = cmd_buffer->state.restart_index; } }