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ac: add has_msaa_sample_loc_bug to ac_gpu_info

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Samuel Pitoiset
2019-08-23 08:50:06 +02:00
parent 021feb1bf6
commit 1bf2572dff
5 changed files with 8 additions and 7 deletions
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5
src/amd/common/ac_gpu_info.c
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@@ -483,6 +483,11 @@ bool ac_query_gpu_info(int fd, void *dev_p,
info->has_tc_compat_zrange_bug = info->chip_class >= GFX8 && info->has_tc_compat_zrange_bug = info->chip_class >= GFX8 &&
info->chip_class <= GFX9; info->chip_class <= GFX9;
info->has_msaa_sample_loc_bug = (info->family >= CHIP_POLARIS10 &&
info->family <= CHIP_POLARIS12) ||
info->family == CHIP_VEGA10 ||
info->family == CHIP_RAVEN;
/* Get the number of good compute units. */ /* Get the number of good compute units. */
info->num_good_compute_units = 0; info->num_good_compute_units = 0;
for (i = 0; i < info->max_se; i++) for (i = 0; i < info->max_se; i++)

1
src/amd/common/ac_gpu_info.h
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@@ -161,6 +161,7 @@ struct radeon_info {
/* Hardware bugs. */ /* Hardware bugs. */
bool has_gfx9_scissor_bug; bool has_gfx9_scissor_bug;
bool has_tc_compat_zrange_bug; bool has_tc_compat_zrange_bug;
bool has_msaa_sample_loc_bug;
}; };
bool ac_query_gpu_info(int fd, void *dev_p, bool ac_query_gpu_info(int fd, void *dev_p,

4
src/gallium/drivers/radeonsi/si_pipe.c
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@@ -1135,10 +1135,6 @@ radeonsi_screen_create_impl(struct radeon_winsys *ws,
#include "si_debug_options.h" #include "si_debug_options.h"
} }
sscreen->has_msaa_sample_loc_bug = (sscreen->info.family >= CHIP_POLARIS10 &&
sscreen->info.family <= CHIP_POLARIS12) ||
sscreen->info.family == CHIP_VEGA10 ||
sscreen->info.family == CHIP_RAVEN;
sscreen->has_ls_vgpr_init_bug = sscreen->info.family == CHIP_VEGA10 || sscreen->has_ls_vgpr_init_bug = sscreen->info.family == CHIP_VEGA10 ||
sscreen->info.family == CHIP_RAVEN; sscreen->info.family == CHIP_RAVEN;
sscreen->use_ngg = sscreen->info.chip_class >= GFX10; sscreen->use_ngg = sscreen->info.chip_class >= GFX10;

1
src/gallium/drivers/radeonsi/si_pipe.h
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@@ -495,7 +495,6 @@ struct si_screen {
bool has_out_of_order_rast; bool has_out_of_order_rast;
bool assume_no_z_fights; bool assume_no_z_fights;
bool commutative_blend_add; bool commutative_blend_add;
bool has_msaa_sample_loc_bug;
bool has_ls_vgpr_init_bug; bool has_ls_vgpr_init_bug;
bool dpbb_allowed; bool dpbb_allowed;
bool dfsm_allowed; bool dfsm_allowed;

4
src/gallium/drivers/radeonsi/si_state.c
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@@ -1034,7 +1034,7 @@ static void si_bind_rs_state(struct pipe_context *ctx, void *state)
si_mark_atom_dirty(sctx, &sctx->atoms.s.db_render_state); si_mark_atom_dirty(sctx, &sctx->atoms.s.db_render_state);
/* Update the small primitive filter workaround if necessary. */ /* Update the small primitive filter workaround if necessary. */
if (sctx->screen->has_msaa_sample_loc_bug && if (sctx->screen->info.has_msaa_sample_loc_bug &&
sctx->framebuffer.nr_samples > 1) sctx->framebuffer.nr_samples > 1)
si_mark_atom_dirty(sctx, &sctx->atoms.s.msaa_sample_locs); si_mark_atom_dirty(sctx, &sctx->atoms.s.msaa_sample_locs);
} }
@@ -3466,7 +3466,7 @@ static void si_emit_msaa_sample_locs(struct si_context *sctx)
struct radeon_cmdbuf *cs = sctx->gfx_cs; struct radeon_cmdbuf *cs = sctx->gfx_cs;
struct si_state_rasterizer *rs = sctx->queued.named.rasterizer; struct si_state_rasterizer *rs = sctx->queued.named.rasterizer;
unsigned nr_samples = sctx->framebuffer.nr_samples; unsigned nr_samples = sctx->framebuffer.nr_samples;
bool has_msaa_sample_loc_bug = sctx->screen->has_msaa_sample_loc_bug; bool has_msaa_sample_loc_bug = sctx->screen->info.has_msaa_sample_loc_bug;
/* Smoothing (only possible with nr_samples == 1) uses the same /* Smoothing (only possible with nr_samples == 1) uses the same
* sample locations as the MSAA it simulates. * sample locations as the MSAA it simulates.