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aco: do not use the vec3 variant for stores on GFX6

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GFX6 only supports vec3 with load/store format.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3432>
This commit is contained in:
Samuel Pitoiset
2020-01-16 14:37:11 +01:00
committed by Marge Bot
parent b8abfafe86
commit 1b5bb204d9
1 changed files with 3 additions and 2 deletions
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5
src/amd/compiler/aco_instruction_selection.cpp
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@@ -4501,7 +4501,8 @@ void visit_store_ssbo(isel_context *ctx, nir_intrinsic_instr *instr)
while (writemask) { while (writemask) {
int start, count; int start, count;
u_bit_scan_consecutive_range(&writemask, &start, &count); u_bit_scan_consecutive_range(&writemask, &start, &count);
if (count == 3 && smem) { if (count == 3 && (smem || ctx->options->chip_class == GFX6)) {
/* GFX6 doesn't support storing vec3, split it. */
writemask |= 1u << (start + 2); writemask |= 1u << (start + 2);
count = 2; count = 2;
} }
@@ -4551,7 +4552,7 @@ void visit_store_ssbo(isel_context *ctx, nir_intrinsic_instr *instr)
case 12: case 12:
vmem_op = aco_opcode::buffer_store_dwordx3; vmem_op = aco_opcode::buffer_store_dwordx3;
smem_op = aco_opcode::last_opcode; smem_op = aco_opcode::last_opcode;
assert(!smem); assert(!smem && ctx->options->chip_class > GFX6);
break; break;
case 16: case 16:
vmem_op = aco_opcode::buffer_store_dwordx4; vmem_op = aco_opcode::buffer_store_dwordx4;